For an MMC model, the limitation maybe the number of available digital channels, rather than the core limitation.
Because with the power modules and PWM Capture blocks we are able to realize more devices while reducing the burden on the CPU.
To elaborate, the PLECS circuit to be deployed on the RT Box for a real-time simulation can be optimized using sub-cycle averaging and model splitting.
Model splitting — With model splitting, for complex circuits, the number of switching combinations can be reduced. For example, as shown in the attached image, if we split the model of the rectifier and inverter together at the DC link level, we can reduce the number of switching combinations to 2^7 instead of 2^12.
Sub-cycle averaging — Using the sub-cycle averaged (hybrid) modules combined with PWM Capture blocks, not only can we increase the PWM resolution to 7.5 ns, but for some topologies, the number of switching combinations can be reduced as well. For example, as seen in the attached image, for a 3-phase NPC model, using sub-cycle averaging, the switching combinations can be brought down to 2^6 from 2^18.
We have done a benchmarking study using an MMC topology to compare the real-time performance of the RT Box 1, 2 and 3. The results are published here -- https://www.plexim.com/content/rt-box-performance-test.
Having said that, if you are able to share the model you’re intending to run on the RT Box, please send us an email to email@example.com, we can investigate it for you.