When using a fixed time step, you have to make sure that all fixed-step events in the model are an integer multiple of the defined fixed step size parameter. With Tsw=1/65e3:

- The PWM modulator requires a fixed time step that's an integer divisor of Tsw/4 (your current time step of 3.846e-06 from the error message).
- Phase shifts require a time step that's an integer divisor of Tsw/3 and 2*Tsw/3.
- You probably want something less than that in order to accurately generate the PWM waveforms for different duty cycles. The PWM duty cycle quantization is directly linked with the fixed step size.

So with the points above, your fixed step solver size should be an integer divisor of Tsw/12 in order to eliminate the error messages. The divisor factor determines your PWM quantization error. Attached is a model that shows this. Note it uses variables set in the Model Initialization Commands.

Using a variable step solver simplifies this process greatly. It might also run faster by avoiding unnecessary solver steps. Also note there's no provision against having fixed-step periodic events when using a variable-step solver. Please reconsider if there's another way to model the fixed-step portion of your system in a way that's compatible with a variable-step solver.

Lastly, you probably want to implement the phase delay by shifting the carrier as you would in most hardware, not by delaying the PWM signals, as shown in the attached model.

Attached the PLECS stand alone model