# Knowledge Base **URL:** https://forum.plexim.com/c/knowledge-base/11.md [Latest](https://forum.plexim.com/latest.md) · [Categories](https://forum.plexim.com/categories.md) · [Tags](https://forum.plexim.com/tags.md) --- ## [About the Knowledge Base category](https://forum.plexim.com/t/about-the-knowledge-base-category/2610)
**Author:** [@Bryan\_Lieblick](https://forum.plexim.com/u/Bryan_Lieblick)\ **Replies:** 0\ **Last updated:** [October 6, 2025, 5:07pm UTC](https://forum.plexim.com/t/about-the-knowledge-base-category/2610 "2025-10-06T17:07:13Z")
Authoritative technical resources for PLECS users written by the Plexim engineering team. This is your destination for high-quality technical content created by the Plexim team. Whether you’re troubleshooting a specific… --- ## [Simulating High-Frequency Converters on the RT Box: A Three-Phase LLC Example](https://forum.plexim.com/t/simulating-high-frequency-converters-on-the-rt-box-a-three-phase-llc-example/3368)
**Author:** [@Munadir\_Ahmed](https://forum.plexim.com/u/Munadir_Ahmed)\ **Replies:** 0\ **Last updated:** [October 29, 2026, 5:15pm UTC](https://forum.plexim.com/t/simulating-high-frequency-converters-on-the-rt-box-a-three-phase-llc-example/3368 "2026-10-29T17:15:26Z")
Overview Advances in wide-bandgap devices allow DC/DC converters to switch at much higher frequencies than with silicon devices. These converters are a challenge for hardware-in-the-loop (HIL) testing, because the HIL… --- ## [Simulating Verilog Logic in PLECS via Verilator](https://forum.plexim.com/t/simulating-verilog-logic-in-plecs-via-verilator/3238)
**Author:** [@Munadir\_Ahmed](https://forum.plexim.com/u/Munadir_Ahmed)\ **Replies:** 0\ **Last updated:** [July 23, 2026, 8:18pm UTC](https://forum.plexim.com/t/simulating-verilog-logic-in-plecs-via-verilator/3238 "2026-07-23T20:18:24Z")
Introduction If your control logic is written in Verilog, headed for an FPGA or ASIC down the line, you’ll eventually want to validate it in PLECS. PLECS can’t run Verilog directly, so the usual options are to hand-trans… --- ## [PLECS Student License Guide](https://forum.plexim.com/t/plecs-student-license-guide/3193)
**Author:** [@Bryan\_Lieblick](https://forum.plexim.com/u/Bryan_Lieblick)\ **Replies:** 0\ **Last updated:** [July 2, 2026, 9:47pm UTC](https://forum.plexim.com/t/plecs-student-license-guide/3193 "2026-07-02T21:47:12Z")
If you study at a university with an agreement with Plexim, you can request a free, fully functional PLECS student license. This guide covers what that license entitles you to, how to get one, and how to fix the proble… --- ## [From Behavioral to SPICE: Building Flyback Models That Match the Problem](https://forum.plexim.com/t/from-behavioral-to-spice-building-flyback-models-that-match-the-problem/3131)
**Author:** [@Munadir\_Ahmed](https://forum.plexim.com/u/Munadir_Ahmed)\ **Replies:** 0\ **Last updated:** [June 2, 2026, 5:27pm UTC](https://forum.plexim.com/t/from-behavioral-to-spice-building-flyback-models-that-match-the-problem/3131 "2026-06-02T17:27:49Z")
Flyback converters remain one of the most widely used isolated power converter topologies, spanning applications from low-power phone chargers to auxiliary bias supplies and industrial power systems in the hundreds-of-wa… --- ## [Voltage-Behind-Reactance Non-Excited Synchronous Machine](https://forum.plexim.com/t/voltage-behind-reactance-non-excited-synchronous-machine/3073)
**Author:** [@Beat\_Arnet](https://forum.plexim.com/u/Beat_Arnet)\ **Replies:** 0\ **Last updated:** [May 15, 2026, 3:42pm UTC](https://forum.plexim.com/t/voltage-behind-reactance-non-excited-synchronous-machine/3073 "2026-05-15T15:42:29Z")
This document describes the structure of the Non-Excited Synchronous Machine model implemented in PLECS. The machine model is applicable to three-phase permanent magnet (PM) and synchronous-reluctance machines. Th… --- ## [How to Measure DC/DC Converter Impedance in PLECS](https://forum.plexim.com/t/how-to-measure-dc-dc-converter-impedance-in-plecs/2662)
**Author:** [@Munadir\_Ahmed](https://forum.plexim.com/u/Munadir_Ahmed)\ **Replies:** 1\ **Last updated:** [May 14, 2026, 2:16pm UTC](https://forum.plexim.com/t/how-to-measure-dc-dc-converter-impedance-in-plecs/2662 "2026-05-14T14:16:50Z")
Output Impedance Measurement of a DC/DC Converter The output impedance of a DC/DC converter can be measured by injecting a small current perturbation at a known frequency across the converter’s output terminals and obser… --- ## [Bandwidth Limits in Control Loops: A Delay-Based Perspective](https://forum.plexim.com/t/bandwidth-limits-in-control-loops-a-delay-based-perspective/3004)
**Author:** [@Beat\_Arnet](https://forum.plexim.com/u/Beat_Arnet)\ **Replies:** 0\ **Last updated:** [April 16, 2026, 6:44pm UTC](https://forum.plexim.com/t/bandwidth-limits-in-control-loops-a-delay-based-perspective/3004 "2026-04-16T18:44:06Z")
« La petite constante de temps, souvent, ce sont les petites choses qui comptent le plus » Prof. Hansruedi Bühler, EPFL When designing a control loop, a key question is: how much control bandwidth can I achieve? Th… --- ## [Discretization Done Right: From Continuous Design to Digital Control](https://forum.plexim.com/t/discretization-done-right-from-continuous-design-to-digital-control/2963)
**Author:** [@Beat\_Arnet](https://forum.plexim.com/u/Beat_Arnet)\ **Replies:** 0\ **Last updated:** [April 3, 2026, 7:16pm UTC](https://forum.plexim.com/t/discretization-done-right-from-continuous-design-to-digital-control/2963 "2026-04-03T19:16:33Z")
You have designed your controller in the continuous domain, it works in simulation, and you are ready to deploy. When you enable code generation on a subsystem, PLECS discretizes its continuous blocks using Forward Eul… --- ## [PWM Harmonic Spectrum: Analog and Digital Controllers Compared](https://forum.plexim.com/t/pwm-harmonic-spectrum-analog-and-digital-controllers-compared/2948)
**Author:** [@Beat\_Arnet](https://forum.plexim.com/u/Beat_Arnet)\ **Replies:** 0\ **Last updated:** [March 27, 2026, 11:54am UTC](https://forum.plexim.com/t/pwm-harmonic-spectrum-analog-and-digital-controllers-compared/2948 "2026-03-27T11:54:58Z")
You have run a frequency sweep, in PLECS or on the bench, and something looks off near Nyquist: the phase hooks upward instead of continuing its descent, or the gain rolls off more steeply than your plant model predict… --- ## [PWM Modulator Delay: Analysis verified by PLECS](https://forum.plexim.com/t/pwm-modulator-delay-analysis-verified-by-plecs/2928)
**Author:** [@Beat\_Arnet](https://forum.plexim.com/u/Beat_Arnet)\ **Replies:** 0\ **Last updated:** [March 18, 2026, 4:18pm UTC](https://forum.plexim.com/t/pwm-modulator-delay-analysis-verified-by-plecs/2928 "2026-03-18T16:18:42Z")
Predicting the delay and magnitude attenuation introduced by a PWM modulator is one of the less intuitive steps in designing a digital control loop. Get it wrong and the loop behaves differently in hardware than expect… --- ## [CPU Overruns and CPU Usage - A Debugging Guide](https://forum.plexim.com/t/cpu-overruns-and-cpu-usage-a-debugging-guide/2877)
**Author:** [@sullivan](https://forum.plexim.com/u/sullivan)\ **Replies:** 0\ **Last updated:** [February 23, 2026, 10:26pm UTC](https://forum.plexim.com/t/cpu-overruns-and-cpu-usage-a-debugging-guide/2877 "2026-02-23T22:26:57Z")
Embedded CPU Usage Problems - Diagnosis and Troubleshooting This post will overview everything needed to know about CPU usage when it comes to the PLECS Coder embedded micro-controller (MCU) targets. This includes the TI… --- ## [Real-Time Implementation and HIL Validation of Dual-Ended Charge Control for LLC Converters in PLECS](https://forum.plexim.com/t/real-time-implementation-and-hil-validation-of-dual-ended-charge-control-for-llc-converters-in-plecs/2844)
**Author:** [@Munadir\_Ahmed](https://forum.plexim.com/u/Munadir_Ahmed)\ **Replies:** 0\ **Last updated:** [February 9, 2026, 8:46pm UTC](https://forum.plexim.com/t/real-time-implementation-and-hil-validation-of-dual-ended-charge-control-for-llc-converters-in-plecs/2844 "2026-02-09T20:46:52Z")
Introduction Advanced control strategies for LLC resonant converters promise improved dynamic performance and robustness, but their practical realization often requires significant effort to transition from offline sim… --- ## [Small-Signal Modeling and Control of LLC Resonant Converters in PLECS](https://forum.plexim.com/t/small-signal-modeling-and-control-of-llc-resonant-converters-in-plecs/2841)
**Author:** [@Munadir\_Ahmed](https://forum.plexim.com/u/Munadir_Ahmed)\ **Replies:** 0\ **Last updated:** [February 6, 2026, 5:23pm UTC](https://forum.plexim.com/t/small-signal-modeling-and-control-of-llc-resonant-converters-in-plecs/2841 "2026-02-06T17:23:07Z")
LLC Resonant Converter Model and Controller Overview in PLECS Different LLC resonant converter control strategies are examined in PLECS, focusing on direct frequency control and charge control and how their small-signa… --- ## [Width Parameter in Heat Sink Component](https://forum.plexim.com/t/width-parameter-in-heat-sink-component/2714)
**Author:** [@Johannes\_Bruderer](https://forum.plexim.com/u/Johannes_Bruderer)\ **Replies:** 0\ **Last updated:** [November 21, 2025, 3:12pm UTC](https://forum.plexim.com/t/width-parameter-in-heat-sink-component/2714 "2025-11-21T15:12:03Z")
What is the purpose of the Width parameter of the Heat Sink component? The Width parameter defines how many heat sink instances are created when the heat sink is placed on top of a vectorized component. In the examp… --- ## [FMU Workflow in PLECS](https://forum.plexim.com/t/fmu-workflow-in-plecs/2713)
**Author:** [@Johannes\_Bruderer](https://forum.plexim.com/u/Johannes_Bruderer)\ **Replies:** 0\ **Last updated:** [November 20, 2025, 6:12pm UTC](https://forum.plexim.com/t/fmu-workflow-in-plecs/2713 "2025-11-20T18:12:26Z")
PLECS 5.0 supports versions 2.0 and 3.0 of the Functional Mock-up Interface (FMI) standard and enables the use of Functional Mock-up Units (FMUs) for both Model Exchange and Co-Simulation. This article describes the exp… --- ## [Moving Subsystem Terminal Positions](https://forum.plexim.com/t/moving-subsystem-terminal-positions/2700)
**Author:** [@Bryan\_Lieblick](https://forum.plexim.com/u/Bryan_Lieblick)\ **Replies:** 0\ **Last updated:** [November 13, 2025, 7:53pm UTC](https://forum.plexim.com/t/moving-subsystem-terminal-positions/2700 "2025-11-13T19:53:26Z")
In order to move a terminal around the edges of a subsystem, place the mouse over the terminal and then hold down the Shift key while dragging the terminal with the left mouse button. This approach is used for any subsy… --- ## [Electric Machines FAQ](https://forum.plexim.com/t/electric-machines-faq/2698)
**Author:** [@Bryan\_Lieblick](https://forum.plexim.com/u/Bryan_Lieblick)\ **Replies:** 0\ **Last updated:** [November 13, 2025, 6:13am UTC](https://forum.plexim.com/t/electric-machines-faq/2698 "2025-11-13T06:13:22Z")
DQ Transformation Multiple conventions exist for the DQ (direct-quadrature) transformation, differing in frame alignment and axis ordering. The choice of convention affects the resulting equations and signs in the model. … --- ## [Digital Controller Design and Implementation Workflow in PLECS](https://forum.plexim.com/t/digital-controller-design-and-implementation-workflow-in-plecs/2673)
**Author:** [@Munadir\_Ahmed](https://forum.plexim.com/u/Munadir_Ahmed)\ **Replies:** 0\ **Last updated:** [November 3, 2025, 8:54pm UTC](https://forum.plexim.com/t/digital-controller-design-and-implementation-workflow-in-plecs/2673 "2025-11-03T20:54:19Z")
When developing digital control algorithms for power converters, engineers often need a structured workflow that bridges the gap between control design, simulation, and embedded implementation. The following workflow ou… --- ## [Influence of Input Filter on Controller Stability](https://forum.plexim.com/t/influence-of-input-filter-on-controller-stability/2665)
**Author:** [@Munadir\_Ahmed](https://forum.plexim.com/u/Munadir_Ahmed)\ **Replies:** 0\ **Last updated:** [October 30, 2025, 9:34pm UTC](https://forum.plexim.com/t/influence-of-input-filter-on-controller-stability/2665 "2025-10-30T21:34:03Z")
DC/DC Controller Design without Input Filter DC/DC converters are often designed assuming an ideal input voltage source, capable of absorbing the switching ripple generated by the converter. In the example below, a buck … --- ## [Runtime Parameter Modifications with Scripting for Changing Thermal Parameters During Simulation](https://forum.plexim.com/t/runtime-parameter-modifications-with-scripting-for-changing-thermal-parameters-during-simulation/2445)
**Author:** [@RetoChristen](https://forum.plexim.com/u/RetoChristen)\ **Replies:** 0\ **Last updated:** [August 12, 2025, 7:48am UTC](https://forum.plexim.com/t/runtime-parameter-modifications-with-scripting-for-changing-thermal-parameters-during-simulation/2445 "2025-08-12T07:48:19Z")
This thread presents three example models that use scripted simulation in PLECS to modify thermal or electrical parameters during runtime. All examples demonstrate similar scripting concepts but target different applicat…