# How do I correct the width of the component terminal?

**URL:** <https://forum.plexim.com/t/how-do-i-correct-the-width-of-the-component-terminal/1198>\
**Category:** PLECS\
**Tags:** electrical, power-semiconductors, power-electronics\
**Created:** [January 6, 2023, 1:32am UTC](https://forum.plexim.com/t/how-do-i-correct-the-width-of-the-component-terminal/1198 "2023-01-06T01:32:49Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![Philip\_Kasempa](https://avatars.discourse-cdn.com/v4/letter/p/c68b51/32.png) [@Philip\_Kasempa](https://forum.plexim.com/u/Philip_Kasempa)\
**Post date:** [January 6, 2023, 1:32am UTC](https://forum.plexim.com/t/how-do-i-correct-the-width-of-the-component-terminal/1198/1 "2023-01-06T01:32:49Z")

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I have designed a three phase inverter control circuit but i’m having trouble correcting the width of the input terminal on the multiplexer to match that of the output. I keep getting the error:

“Error in component Voltage Source Inverter/Demux3: Width of component terminal (3) does not match width of connection (1). The connection width is fixed by component Voltage Source Inverter/Symmetrical PWM/Configurable Subsystem/Single edge/C-Script. Check the parameters and connections of these components to correct the error.”

 ![Screenshot (201).png](https://europe1.discourse-cdn.com/flex006/uploads/plecs/original/1X/a7acc1469f6fa438218eff187eff43fc55cefe41.png)

 ![Screenshot (202).png](https://europe1.discourse-cdn.com/flex006/uploads/plecs/original/1X/c586d1c4a79fd91fdd2e5d2585abb6628370077b.png)

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<div class="post-metadata">

**Author:** ![Bryan\_Lieblick](https://dub1.discourse-cdn.com/flex006/user_avatar/forum.plexim.com/bryan_lieblick/32/10_2.png) [@Bryan\_Lieblick](https://forum.plexim.com/u/Bryan_Lieblick)\
**Post date:** [January 6, 2023, 2:01pm UTC](https://forum.plexim.com/t/how-do-i-correct-the-width-of-the-component-terminal/1198/2 "2023-01-06T14:01:27Z")

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If the input to your division operation is left unconnected then inputs and outputs of your PWM block have a width of 1.

If you connect an element with a width of 3, then the input signal will have a width that matches assumed with of the output signal.

For example, you can connect the output of the Sum to the left of the Division component, a multiplexer with a width of 3, and so on.