# Nanostep solver update

**URL:** <https://forum.plexim.com/t/nanostep-solver-update/1587>\
**Category:** RT Box\
**Tags:** plecs, rt-box\
**Created:** [December 5, 2024, 7:34am UTC](https://forum.plexim.com/t/nanostep-solver-update/1587 "2024-12-05T07:34:36Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![jose](https://avatars.discourse-cdn.com/v4/letter/j/e274bd/32.png) [@jose](https://forum.plexim.com/u/jose)\
**Post date:** [December 5, 2024, 7:34am UTC](https://forum.plexim.com/t/nanostep-solver-update/1587/1 "2024-12-05T07:34:36Z")

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Hi.

With the new update of the solver (Nanostep solver) can I achieve simulations with a discreditation step size less than 1 microsecond in RTBOX 1?

Thank you all.

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**Author:** ![EnriquePLECS](https://dub1.discourse-cdn.com/flex006/user_avatar/forum.plexim.com/enriqueplecs/32/2276_2.png) [@EnriquePLECS](https://forum.plexim.com/u/EnriquePLECS)\
**Post date:** [December 5, 2024, 2:33pm UTC](https://forum.plexim.com/t/nanostep-solver-update/1587/2 "2024-12-05T14:33:46Z")

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Dear Jose,

yes, on top of the 1xCPU core for simulation you will have a dedicated nanostep solver running on the FPGA. What you run on the nanostep solver will be calculated with a step size of 7.5ns. However, not every component can be executed in the nanostep solver, only specific topologies that we will provide in the PLECS library (e.g buck/boost, DABs, LLC, CLLLC, 3ph inverters, among many others).

If you have a specific topology in mind you can let us know.

 ![Screenshot 2024-12-05 at 15.25.58](https://europe1.discourse-cdn.com/flex006/uploads/plecs/original/2X/3/330dfad9507f1709b85b7fd483f43a27dc98b2db.png)
