# PWM signal in f28049c card using C2000 code generator **URL:** \ **Category:** TI C2000\ **Tags:** c2000\ **Created:** [April 26, 2021, 6:28pm UTC](https://forum.plexim.com/t/pwm-signal-in-f28049c-card-using-c2000-code-generator/1015 "2021-04-26T18:28:42Z")\ **Posts on this page:** 3\ **Page:** 1
**Author:** ![T\_Harzig](https://avatars.discourse-cdn.com/v4/letter/t/898d66/32.png) [@T\_Harzig](https://forum.plexim.com/u/T_Harzig)\ **Post date:** [April 26, 2021, 6:28pm UTC](https://forum.plexim.com/t/pwm-signal-in-f28049c-card-using-c2000-code-generator/1015/1 "2021-04-26T18:28:42Z")
Hello, I am trying to implement a code in my f28049c to control the TI boostxl-buckconv card (a synchronous buck converter). I wanted to do a test asking for two GPIO to input a square wave (pulse generation block) to the mosfets at a frequency of 20 kHz with a duty cycle of 0.5 and discretization period of 5e-6 s. I am measuring the gate signal with an oscilloscope and could not see any signal. If I implement a signal of 10 kHz with a discretization of 1e-5 it is working but every time the discretization is less than 1e-5s I could not get any gating signal. Does anybody have a solution to that or ran through this issue? I need to implement an MPC control algorithm with at least a sampling of 25e-6 s(40 kHz). Best, T. Harzig ---
**Author:** ![Manu\_Parimi](https://dub1.discourse-cdn.com/flex006/user_avatar/forum.plexim.com/manu_parimi/32/6_2.png) [@Manu\_Parimi](https://forum.plexim.com/u/Manu_Parimi)\ **Post date:** [April 27, 2021, 5:53pm UTC](https://forum.plexim.com/t/pwm-signal-in-f28049c-card-using-c2000-code-generator/1015/2 "2021-04-27T17:53:01Z")
Hi Harzig, I was not able to implement a step size of 5e-6 seconds (200 kHz) either, I think it is too fast for this controller. However a sample step size of 12.5e-6 seconds (80 kHz) seems to work. I implemented the attached model on a [280049C launchpad](https://www.ti.com/tool/LAUNCHXL-F280049C). There are two subsystems. The subsystem labeled “280049\_pwm” is using a PWM block instead of the digital outs. The advantage of this implementation is that irrespective of the duty cycle value, you can have a sample step-size same as the switching period. ![6](https://europe1.discourse-cdn.com/flex006/uploads/plecs/original/1X/8c01ac49c9f79828491a1eb138de816ef01c71d4.jpeg) The subsystem labeled “280049\_digital” is using a pulse generator block. The disadvantage here is that you need to consider the duty cycle value in the sample step-size. For example, for a switching frequency of 40e3 and duty cycle of 0.5, the sample step size must be an integer multiple of 0.5/40e3. ![6](https://europe1.discourse-cdn.com/flex006/uploads/plecs/original/1X/70b85230dd261da7b812063051e6afae250ccfdb.jpeg) ![6](https://europe1.discourse-cdn.com/flex006/uploads/plecs/original/1X/1e1a1e6f21a82fd76fa4dbf37ceceb254ee087d5.jpeg) If you want to further discuss your controller implementation, email us at support@plexim.com.Regards,Manu [test\_pwm.plecs](https://forum.plexim.com/uploads/short-url/fpRPxQJDs5pvlYt8X33dwcuwcxH.plecs) (28.9 KB) ---
**Author:** ![T\_Harzig](https://avatars.discourse-cdn.com/v4/letter/t/898d66/32.png) [@T\_Harzig](https://forum.plexim.com/u/T_Harzig)\ **Post date:** [June 3, 2021, 2:34pm UTC](https://forum.plexim.com/t/pwm-signal-in-f28049c-card-using-c2000-code-generator/1015/3 "2021-06-03T14:34:41Z")
Hello Manu, Thank you for your answer and for the simulation you just sent me. I implemented my control scheme on the card and I noticed couple issues (with a sampling period of 25 us). When I run the external mode on my laptop I notice that the CPU load block display a value of 80 and then not long after, my laptop is not capable of detecting the card anymore. Is 80 for CPU load too much ? Also, using a simulation of the synchronous buck I managed to draw what I am supposed to have for the gate signals. When comparing the simulation results to the actual the gate signals I have something way different and it seems that the controller stops working. You will see in the attached file that i kept the LED blinking in a task and the control scheme in another. I set up the multi tasking mode (to separate the blinking from the actual controller scheme). Can this have an impact on how the gate signals are sent to the MOSFET ? Sorry for the late answer Best, Thibaut Harzig ![Capture.PNG](https://europe1.discourse-cdn.com/flex006/uploads/plecs/original/1X/56aab83e66f601ccc558b48c6e50bfb59a7081d9.png) ![Capture2.PNG](https://europe1.discourse-cdn.com/flex006/uploads/plecs/original/1X/3376fbe92ce6d9828d85c9845af68f6707cd4b02.png)