# Switching losses a simple boost topology with the SiC module CAB500M17HM3
**URL:** https://forum.plexim.com/t/switching-losses-a-simple-boost-topology-with-the-sic-module-cab500m17hm3/1293
**Category:** PLECS
**Tags:** \#thermal\_analysis, \#sic\_module, \#negative\_current\_side, \#dc\_dc\_topology, \#switching\_losses
**Created:** [November 29, 2023, 6:46pm UTC](https://forum.plexim.com/t/switching-losses-a-simple-boost-topology-with-the-sic-module-cab500m17hm3/1293 "2023-11-29T18:46:07Z")
**Posts on this page:** 3
**Page:** 1
### Author:  [@Vafa\_Marzang](https://forum.plexim.com/u/Vafa_Marzang)
#### Post date: [November 29, 2023, 6:46pm UTC](https://forum.plexim.com/t/switching-losses-a-simple-boost-topology-with-the-sic-module-cab500m17hm3/1293/1 "2023-11-29T18:46:07Z")
I want to simulate a simple DC-DC boost converter based on a SiC power module 1697-CAB500M17HM3-ND. This item is modeled for Thermal analysis in PLECS, but the switching losses for the upper switch is zero (the lower side MOSFET’s switching losses are simulated correctly). I think, It comes from the negative side of the current and this negative current does not model for this SiC power MOSFETs (CAB500M17HM3).
On the other way, the upper side MOSFET’s current is reverse/negative and the SiC molded just modeled for the positive sides from (-10A to 1000A). Therefore, the PLECS shows the switching losses equal to zero which is wrong. How can I fix this error?
(For the conduction losses, it seems ok, as both negative and positive currents are modeled)
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### Author:  [@Bryan\_Lieblick](https://forum.plexim.com/u/Bryan_Lieblick)
#### Post date: [December 1, 2023, 11:08am UTC](https://forum.plexim.com/t/switching-losses-a-simple-boost-topology-with-the-sic-module-cab500m17hm3/1293/2 "2023-12-01T11:08:11Z")
Vafa, can you post your model so we can better understand your observations?
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### Author:  [@Vafa\_Marzang](https://forum.plexim.com/u/Vafa_Marzang)
#### Post date: [December 1, 2023, 8:11pm UTC](https://forum.plexim.com/t/switching-losses-a-simple-boost-topology-with-the-sic-module-cab500m17hm3/1293/3 "2023-12-01T20:11:40Z")
Please find attached the simulation file for your reference.
It is worth noting that the switching losses for the upper side MOSFET (SH) is zero in this file. Additionally, the model for the power MOSFETs in use is selected from the Wolfspeed database.
Should you require any additional information or clarification, please do not hesitate to contact me.
Many thanks
[PLECS.plecs](https://forum.plexim.com/uploads/short-url/7vKXuJzSo4UUbqgpEAR727UslT0.plecs) (71 KB)