# \#parasitic-capacitance-c\_ds

**URL:** https://forum.plexim.com/tag/parasitic-capacitance-c-ds/650.md

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## [Solving algebraic loop due to parasitic Gate Source Capacitance in 3-LVL-ANPC under different modulation strategies](https://forum.plexim.com/t/solving-algebraic-loop-due-to-parasitic-gate-source-capacitance-in-3-lvl-anpc-under-different-modulation-strategies/1312)

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**Author:** [@THK](https://forum.plexim.com/u/THK)\
**Replies:** 1\
**Last updated:** [February 6, 2024, 11:33am UTC](https://forum.plexim.com/t/solving-algebraic-loop-due-to-parasitic-gate-source-capacitance-in-3-lvl-anpc-under-different-modulation-strategies/1312 "2024-02-06T11:33:40Z")

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Hello, I would like to investigate different modulation strategies for a 3-LVL-ANPC-SiC topology under different operating points in terms of overall efficiency and power dissipation (temperature) per switch. To additi…