# \#triggered-subsystem

**URL:** https://forum.plexim.com/tag/triggered-subsystem/390.md

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## [PWM and Trigger](https://forum.plexim.com/t/pwm-and-trigger/2451)

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**Author:** [@Rafael\_de\_Almeida](https://forum.plexim.com/u/Rafael_de_Almeida)\
**Replies:** 3\
**Last updated:** [August 13, 2025, 6:41pm UTC](https://forum.plexim.com/t/pwm-and-trigger/2451 "2025-08-13T18:41:57Z")

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I want to use the PWM generated by the stm32 with the trigger connect in an ADC for “lock”(stay the same value) the ADC’s reading when the PWM signal is low. There’s a way to do that?How the trigger signal affect the ADC…

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## [PWM stm32-F303RE](https://forum.plexim.com/t/pwm-stm32-f303re/2404)

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**Author:** [@Rafael\_de\_Almeida](https://forum.plexim.com/u/Rafael_de_Almeida)\
**Replies:** 6\
**Last updated:** [August 6, 2025, 7:21pm UTC](https://forum.plexim.com/t/pwm-stm32-f303re/2404 "2025-08-06T19:21:33Z")

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Hello, I am trying to use two PWM blocks in my application — one to trigger the ADC and the other for the actual input to the ADC. When I was testing with just one PWM handling both functions, it was working. But when I …

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## [Intrinsic one sample delay in triggered subsystem?](https://forum.plexim.com/t/intrinsic-one-sample-delay-in-triggered-subsystem/638)

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**Author:** [@nikilito](https://forum.plexim.com/u/nikilito)\
**Replies:** 1\
**Last updated:** [March 22, 2019, 8:57am UTC](https://forum.plexim.com/t/intrinsic-one-sample-delay-in-triggered-subsystem/638 "2019-03-22T08:57:16Z")

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Hello everyone, I just want to ask something about triggered subsystem. I used this kind of system to simulate a board that works with discrete cycle time. Let’s suppose a simple empty triggered block..Single input, si…