Hi there! I am trying to use a manufacturer’s thermal model for a FET to obtain conduction loss values. I set up a PLECS model similar to what is shown in the picture below (heat sink for a single FET → Rth (case-to-ambient) → ambient temp) for the loss simulation. I largely followed the example in the guide: Introduction to thermal domain for my setup and measurements, but adjusted for my own circuit model.
I added a heat flow meter in series with Rth and noticed that a discrepancy exists between the heat flow value with the conduction loss that has been periodically averaged. On page 7 of the guide, the explanation says, “There is a difference because the heat flow meter measures the heat flow in the ther mal circuit, where it takes several seconds for the heat sink to warm up due to its capacitance. The loss probes, however, are connected directly to the components’ junctions.” However, even in thermal equilibrium when the temperatures are no longer changing, the discrepancy still exists. Why does this discrepancy exist still?
This matters to me because I wanted to ensure that the temperature changes due to Rth and Tambient is correctly factored in for the temperature-dependent Rds,on interpolation and conduction loss calculation. To verify the thermal model’s setup, I manually calculate the loss using fixed Rds,on values from the datasheet and then do (1) Tjunction - Tcase = ΔT(rise in junction); (2) Pconduction = ΔT(rise in junction)/Rjc. Alternatively, I set Rth to 1 K/W and also tried computing the conduction loss by just taking (Tcase - Tambient), but that matches the heat flow meter’s measurement, and I am having trouble understanding the discrepancy between heat flow and conduction loss as described above. In either case, that value does not match the “conduction loss” output of the MOSFET model, with my value being significantly higher than the reported value (29 W vs. 38 W vs. 14 W). Why is this the case? Are my calculations methods incorrect, or is there a thermal vs. electrical domain setup that I’m not capturing? I don’t expect my hand calculations to match exactly, but at least they should come close in range. How can I verify if the temperature is factored into the Rds,on interpolation correctly, and that the loss calcs are accurate to the manufacturer’s datasheet?
I understand this is a long read - thank you very much for your time and help in advance!
The loss probe mentioned in the tutorial measures the total semiconductor losses of both the IGBT and the diode. This is the power that is fed into the thermal network. The signal increases instantaneously as soon as the semiconductor devices start conducting. Since the Switch Loss Calculator uses an averaging approach, the calculated losses quickly converge to a stable average value, as shown by the red trace in the figure below.
The heat flow meter, on the other hand, is placed after the heat sink. Its response is delayed because the thermal capacitances of both the semiconductor thermal network (implemented as a Cauer network in the thermal description) and the heat sink must first be charged. These thermal capacitances also act as a low-pass filter. As a result, the heat flow signal is smoother, although a small ripple at the switching frequency may still be visible (green trace).
Once the system has reached thermal steady state, both signals converge to essentially the same average value. While the heat flow meter still contains a small switching-frequency ripple, the mathematically averaged loss signal is perfectly flat.
Hi Reto, thank you very much for your follow up. If I understand you message correctly, the heat flow and conduction loss measurement should converge in thermal equilibrium. However, I am observing discrepancy even after it reaches that. I followed the setup in the guide for my own circuit model but am struggling to resolve the discrepancy. Would it be possible at all for you to kindly take a look at my simulation model and provide some guidance on what may be wrong with my setup? I have attached the PLECS model and the FET thermal model file in this message.
Hi @plexie
The heat flow and the total semiconductor loss should converge. In other words, the semiconductor losses fed into the thermal model must eventually flow through the heat flow meter once thermal equilibrium has been reached.
Please find the attached model, which demonstrates this behavior.
Hi Reto, thank you very much for the follow up - really appreciate it. That was completely an oversight on my end. I did realize why I didn’t capture the total semiconductor loss earlier, as I had thought the thermal model didn’t include any switching loss when I used too short of a simulation time. After extending my simulation time, I noticed that the switching loss of the device suddenly steps up past some time (100 ms), and this time delay appears both in the test model I attached in my prior message and a power circuit that I am simulating (not included). Do you happen to know if this is expected? Is it due to the internal setup of how switching loss is calculated in PLECS or the manufacturer’s thermal model?
Good catch regarding the 100 ms delay in the displayed switching losses. This originates from the Averaging time parameter in the Periodic Impulse Average (Switching Loss) block, which was still set to its default value of 0.1 s. After changing it to 1/fs, as used for the other averaging blocks, the delay disappeared.
Please note that this change only affects the signals displayed in the Averages scope. The underlying loss calculation and the solution of the thermal network remain unchanged, since the averaging block only processes the loss signal for visualization. FET Loss Calc Test_RC2.plecs (44.5 KB)
I would also like to highlight the distribution between conduction and switching losses. At steady state, the conduction losses are approximately 2.5 W, while the switching losses are around 91 W. Such a large difference indicates that this semiconductor may not be the best fit for the application, so I wanted to point this out.
Finally, I noticed an error in the Cond. Loss (Gate Off) data of the thermal description. At 0 A, the forward voltage was defined as a non-zero value. I corrected this by adding a data point of 0 V at 0 A and moving the previous values to -0.1 A. AIMBG120R010M1_switch_RC.xml (11.3 KB)
