Problem with InitialSystemState between variable / discrete time implementations

PLECS
1

Hi,

INTRODUCTION:

I’m using scripting to run my PLECS simulations. Using ‘Analysis’ instead of ‘Simulate’ with variable step size was not satisfying, as I’m using nonlinear passive component models and the variable step size did not give the expected results.

Using ‘Analysis’ with needed fine discrete time step size instead, was much slower then using ‘Simulate’ until reaching steady state.

To speed up everything, i would like to try a 2 step approach:

1st: rough and fast simulation until reaching steady state, either with variable step size or a coarse discrete time step size

2nd: run a short discrete step size simulation for precise results by loading the system state of the first simulation.

PROBLEM DESCRIPTION:

When the second simulation starts, I get the following errors:

“The number of input signals has been changed. The custom state can not be restored.”

“Error while executing restore custom state function code: Reading custom state failed.”

I found out, that the source of the error is in the (“Pulse Delay/C-Script”), because the internal state of the variable step size implementation seems not to be compatible with the internal state of the discrete step size implementation.

For better understanding, I exported the essence of my problem in a simple model, which by it’s own makes little sense, but it shows well the described problem.

Have a look at the scripting part and execute it to see the problem.

First I run 2 consecutive discrete time step simulations with the same step size. As it can be seen in the console output, the exported System State have quite a big amount of data content. The second discrete time step simulation runs then well with the imported system state.

with initialization bDiscrete = true;

Secondly I repeat the same simulation steps, but using a coarse step size for the first simulation and a fine step size for the second simulation. The error pops up.

with initialization bDiscrete = false;

Secondly I repeat the same simulation steps, but using a variable step size for the first simulation and a fine step size for the second simulation. The error pops again up.

QUESTION:

Is there a way to modify/manipulate/augment/translate the structure of the SystemState / Custom State struct exported from variable time step simulation in a manner, that it reflects the correct data to be imported in a discrete step size simulation system state?

Debug_Model.plecs (10.2 KB)

2

Thanks for the clear description and distillation of your questions/observations. As you noted, the pulse delay implementation changes based on the chosen solver with unique C-Script based implementations.

In principle you can edit the Octave structs representing the system state. However, in practice there are complications as a) the pulse delay implementations require different stored data and b) some data is stored as encoded strings.

Since you’re using a fixed-step solver in many instances, perhaps using a Delay or Zero Order Hold would be a more straightforward approach.

3

Thanks for the reply. I was trying to solve this issue without changing the Pulse Delay to another block, because this makes part of some sub-sub-sub-circuit of the Three-Phase T-Type Inverter Demo Model.

That was clear to me from the error message. But if I know which kind of data one implementation needs and which kind of information the other implementation needs, I was thinking of a possible programmatic “translation” from the variable time step simulation System State output to the discrete time step simulation System state input.

I tried to decode the stored data looking into the C-code “Store” and “Restore” sections of the variable step and discrete step implementations, but without success. If there would be a publicly available encoding description for the System state storage structure, I would like to give it another try. Might be useful not only for me.