Hello
I try to take the output capacitance losses into account in a half bridge configuration with an inductor at the output with current leaving the half-bridge. Those losses are present during hard-switching on (only on high side FET) even when Id=0 (high side FET discharges the high side output C and charges low side output C). Therefore, I took those losses in the “Turn-on Loss” Table when Id=0 (C not present in model) (see attachment).
I have implemented dead time on the half-bridge. Therefore, the low side FET should not see turn-on losses as the output capacitances are charged/discharged with the load during dead time. But the low side FET shows switch-on losses even though the gate is switched off. See attachments!
The turn-on losses for the low-side FET should be calculated at the instant when the gate voltage rises (device voltage is zero and therefore, the losses should be zero). But it calculates the switching losses already before the FET is switched on (when the high side FET is switched off).
Is there a way to solve this issue or am I forcing plecs to do something not meant to be done?
It seems you are using the same thermal description in this case for both low- and high-side switches? Could you modify (only) the low-side switch’s model to have 0J at 0A and all voltage values? But based on your waveforms I am also a little confused - are you able to provide the full PLECS model for further analysis? And can you confirm what you modified from the original EPC model?
Hello Kris
Thank you for your quick reply.
Yes, I try to keep the thermal description as generic as possible and use the same description for low- and high-side switch. I have attached the model.
In the actual project I will use another EPC device with no model available for Plecs (space qualified). Therefore, I downloaded the thermal description of EPC2207 and built my own model for comparison and to verify the approach. Later, I will adjust the model to the space qualified switch. Also the circuit will be much more complex. The buck converter in the Plecs model is only used to verify the thermal description.
EPC2207_LossModel.7z (4.76 KB)
In your attached model I see the low side FET exhibits turn-on losses due to the non-zero voltage (before) and current (after) the switching event. So this is the expected result in PLECS. Are you talking about something else?
This is what I am talking about. But we need to define the “switching event” better. According to my understanding, the switching event should be related to each individual FET. You are now referring to the switching event of the whole half-bridge.
Switching event of low side FET: the low side FET has zero voltage and non-zero current before and after the switching event what should not exhibit any turn-on losses.
Switching event half-bridge (high side FET switching off, deadtime, low side FET switching on): what Plecs shows are turn-on losses caused by the high side FET switching even though the low side FET is still turned off.
It gets more obvious if you increase the deadtime.
So every switch independently looks the applied voltage and current before/after the switching instances, independent of the topology, dead time, etc.
In the case of the “MOSFET with Diode” switch in PLECS, it is a single component and yet it can conduct current in third quadrant whether or not the gate is on as the diode can turn-on (as it does in this case during the dead time). And indeed the turn-on and turn-off losses for this combined component are included for both the MOSFET and diode in a single table in each cast. So I think this might be the source of the confusion.
I might recommend that you “zero out” the turn-on losses in the negative current quadrant as in the attached screenshot so as to avoid these losses when the diode turns-on, as these are basically negligible:
Let me know if this is clear!
OK, I see. In the MOSFET with Diode model, the switch-on losses for negative currents are for the diode-part of the MOSFET only. With this approach I can not model the FET during hard- and soft-switching (model can not differentiate between the turn-on losses caused by the diode and by the output capacitance). Therefore, I will use the MOSFET without diode and use a separate diode in parallel to model the reverse conduction mode of the GaN FET. I can then add both losses and the model works for both hard and soft switching.
Thank you for the support
