FET output capacitance losses in third quadrant operation

It seems you are using the same thermal description in this case for both low- and high-side switches? Could you modify (only) the low-side switch’s model to have 0J at 0A and all voltage values? But based on your waveforms I am also a little confused - are you able to provide the full PLECS model for further analysis? And can you confirm what you modified from the original EPC model?