Gate voltage in the power electronics modeling and simulation

Hello,

To a particular practical power MOSFET, the output characteristic (IDS vs VDS) is always VGS-dependent (from the datasheet). But in PLECS, how we really involve VGS in the simulation model?

For example, in the given demo “Open-Loop Control of a VSI”, all Gates are given “sw’” which are essentially digital PWM signals (pls correct me if I understand it wrong…) bouncing between 0 and 1. Thus the real analog VGS (which practically bouncing between -4V and 15V) is missing in the simulation, right? If yes, could we simply amplify “sw’” to between 0 - 15 so that we can involve the effect of VGS? If this does NOT make any difference, then again, how we really involve VGS in the simulation model? (I’ve actually never seen any simulation software being able to involve the MOSFET DRIVER part into the simulation… and wonder why and how.)

Thanks for the patience!

BJ

There is no dependency on VGS for the ideal MOSFET model in PLECS. The gate input for switching devices in PLECS is a control signal and not an electrical connection. In PLECS a MOSFET will conduct for any non-zero gate input.

Rather than representing the physical details of a given power semiconductor, PLECS uses a simplified behavioral semiconductor model. At the core of such models is the ideal switch. It is either ‘on’ (short-circuited) or ‘off’ (open-circuited) and toggles between these positions instantaneously. PLECS models with ideal switches run extremely fast compared to more detailed physical models, allowing users to quickly simulate the system-level behavior of a power conversion system.

A SPICE-type tool is better suited for simulations requiring detailed physical switch models, gate driver circuit analysis, MOSFETs operating in the saturation region, and so on.

Thank you Bryan for the explanation!