Gate voltage in the power electronics modeling and simulation

Hello,

To a particular practical power MOSFET, the output characteristic (IDS vs VDS) is always VGS-dependent (from the datasheet). But in PLECS, how we really involve VGS in the simulation model?

For example, in the given demo “Open-Loop Control of a VSI”, all Gates are given “sw’” which are essentially digital PWM signals (pls correct me if I understand it wrong…) bouncing between 0 and 1. Thus the real analog VGS (which practically bouncing between -4V and 15V) is missing in the simulation, right? If yes, could we simply amplify “sw’” to between 0 - 15 so that we can involve the effect of VGS? If this does NOT make any difference, then again, how we really involve VGS in the simulation model? (I’ve actually never seen any simulation software being able to involve the MOSFET DRIVER part into the simulation… and wonder why and how.)

Thanks for the patience!

BJ

PLECS 4.9 and earlier exclusively use ideal switches and does not include physical models of components as you would find in SPICE, and therefore there is no Vgs depedendency. PLECS Standalone 5.0 includes a solver engine capable of simulating SPICE netlists, where you will see waveforms better aligned with your expectations.

There is no dependency on VGS for the ideal MOSFET model in PLECS. The gate input for switching devices in PLECS is a control signal and not an electrical connection. In PLECS a MOSFET will conduct for any non-zero gate input.

A MOSFET implemented with a SPICE netlist will have an electrical connection to the FET gate, and is better suited for simulations requiring detailed physical switch models, gate driver circuit analysis, MOSFETs operating in the saturation region, and so on.

Thank you Bryan for the explanation!