Soft-switching 3-phase inverter in PLECS: Sa won’t turn off + transformer “state discontinuity” — need wiring/logic tips

[Musab]

Hi all,

I’m reproducing the topology from “Three-Phase Soft-Switching Inverter With Minimum Components” in PLECS. I’m using a Linear Transformer to emulate the coupled inductor, plus the auxiliary switch Sa, clamp diode D, and resonant Cr.

What works / what I see

• PWM/SPWM and gating run; Mode-1..3 look reasonable.

• Vcr responds, and changing the diode forward drop affects how completely Cr discharges (higher Vf → deeper discharge, but I also get overshoot). Since, in the paper’s graph Vd starts with Vs (100V) and then gets to 0V so should I put 100V as Vf?

The blocker

• After the first cycle Sa turns ON and never turns back OFF. If I generate Sa with an AND of three monoflop pulses (one per phase edge), it stays high forever.

• Switching the combiner to OR (so Sa = NOT(OR(pulses))) allows Sa to drop, but then I get a “state discontinuity after switching” in the inductors inside the Linear Transformer.

Tooling / control uncertainties

• The paper uses a PWM Delay and flip-flops; in PLECS I substituted Blanking Time/Transport Delay and Edge Detection + Monoflop.

  • I’m unsure about generating Q̅ cleanly and matching the paper’s timing exactly.

• I loaded the Infineon thermal MOSFET models and set device deadtime = 0 (paper handles timing externally). I don’t see any change, should I worry?

What I’m asking

• Best practice to combine the three Sa-OFF pulses (per phase edge)?

• Common causes/fixes for state discontinuity when using Linear Transformer as the coupled inductor (wiring/polarity of the clamp, tiny parasitics, solver/event settings)?

• Clean PLECS equivalents for the paper’s PWM Delay and SR flip-flops (especially Q/Q̅).

Setup / parameters

• SPWM: 400 Hz sine refs (0.8 p.u., 120° shift), carrier 20 kHz (±1). Vs: 100 V

• Load: L = 2.86 mH, R = 9.6 Ω.

• Aux network: Lr = 17 µH, Cr = 10 nF.

• PLECS: Standalone; Linear Transformer in place of coupled inductor; Infineon MOSFET w/ diode models; device deadtime set to 0.

This is my first PLECS build, any wiring/logic pointers or minimal example snippets would be hugely appreciated. Thanks!

SS Research Paper.plecs (104.7 KB)

[RetoChristen]

Hi Musab

Notes on Soft-Switching in PLECS

Just to clarify: PLECS can’t directly model soft-switching. The thermal data (which you didn’t attach) is most likely based on hard-switching conditions anyway.
What you can do is check whether the circuit operates in soft- or hard-switching mode. Soft-switching losses will always show up as zero, but since they’re usually much smaller than hard-switching losses, this is still a reasonable simplification.
If you’re focused purely on SS losses, a SPICE simulation would be the better approach.

Comments on Your Model

SA Logic:
Your SA logic seems off. Since you’re AND-ing pulses and then inverting them, the output is always high. From your screenshot, it looks like you actually need an SR flip-flop with Q̅ as the output. Also, does “3u” mean a 3 µs delay/discretization? I don’t see this Flip-Flop block in my Simulink library.

PWM:
Your PWM modeling is fine. You could also use the Symmetric PWM block in PLECS with a vector input It’s functionally the same but looks cleaner.

State Discontinuity:
This happens because you’re switching an inductive current. Either turn off exactly at zero current or provide a freewheeling path.

Simulation Settings:
You set the max step size to 1e-7, which effectively forces a fixed timestep. I’d revert this to the default. Always start from there.

Transformer:
A Mutual Inductor might be a better fit than a linear transformer for your case.

Suggestion

Get the logic signals to match those in the reference paper first. Then focus on the electrical side.

SS Research Paper_RC.plecs (120.9 KB)