Hallo Everyone,
I am completely new to Plecs.
I would like to ask a question about Error “State discountinuity after switching” for this circuit, I have searched in the Forum about this issue, and tried to solve it, but I ended up with no success, so could anyone give me a step to step solution about it? what should I set?
Thank you very much for help.
Kamil
It seems that your converter construction and modulation approach are resulting in the ideal capacitors in a quasi-parallel configuration with unequal charge. I suspect the series connection of C1 & C3 is in parallel with C0. This would result in infinite current to equalize the charges between the two circuits.
One debugging technique to work through the state-space discontinuity error is to add resistance to your circuit such that the rate of charge equalization is limited. You can add an ESR to the capacitors or a resistance to the diodes. This will allow the simulation to proceed so you can analyze it further. One should be cognizant there may be very high transient currents in your circuit.
