Class D circuit does not work (operator error)

PLECS
1

Can you please help fix the issues with this attached circuit? All I want to do is create a sine wave output and clearly I don’t know how to use this tool.

1500W Class D.plecs (11.8 KB)

2

Dear @dandrea

So far you have only probed the gate signals for the MOSFETs. For this reason, you don’t see the output. If you change this in the Probe block, the generated sine waves are visible in the scope.

To get smoother signals, I have changed the refine factor in the Simulation Parameters to 5.

1500W Class D_RC.plecs (14.6 KB)

3

Thank you very much! Here is a slightly revised circuit. Do you know why there is a DC component on the output?

1500W Class D_RC.plecs (20.7 KB)

4

Regarding your revised circuit: are you trying to model dead-time? If so, please use the dedicated Turn-on Delay blocks in PLECS (see the attached model).

As for the DC component at the output, there are several ways to eliminate it. One option is to shift the supply rails from +Vdc, GND to +Vdc/2 and –Vdc/2, so that the output naturally centers around ground. Alternatively, you can insert a large output coupling capacitor, or use a bridge-tied load (BTL) configuration with two half-bridges driven in antiphase.

1500W Class D_RC2.plecs (20.3 KB)

5

Your quick response is amazing

1500W Class D_RC.plecs (26.6 KB)

. Here is the new circuit with your mods. Please give me any thoughts as to why the output (voltage across R1) is unstable.

1 Like
6

First of all, I’d like to point out that I’m not a specialist in Class D design. I’m simply gathering some information from online sources (for example, Infineon’s application note, Class D Amplifiers: Fundamentals of Operation and Recent Developments | Analog Devices ) and trying to apply it in PLECS.

One thing I noticed is that generating separate gate signals for the second half-bridge is not the right approach. Instead, you should reuse the existing signals. This is also how it would be done in a real prototype.

Regarding the unstable signals:

  • If I Comment out the capacitors and Comment through the inductors, I end up with a purely resistive load. Looking at the voltage across the load in that case, it looks reasonable and exactly what I’d expect from an H-Bridge.

  • When I add the inductors back into the circuit, the signals again match my expectations.

  • The instability only shows up when I include the capacitors. Increasing their values helped stabilize things.

It’s possible that the values you used (330 nH) were either a typo or incorrectly set. Using 33 µH instead solved the issue in my case.

1500W Class D_RC3.plecs (22.9 KB)