You can use your variant-based approach and have a discrete system modeled using the approach outlined in this forum post: Running PLECS blockset model with a smaller time step than the Simulink fixed time step - #2 by Bryan_Lieblick.
Your test model shows the issue in is not due to the mixed-step nature of your simulation. Rather it is solver/circuit related, which sometimes requires a mix of expertise/intuition to resolve. In fact, if you replace your Simulink blocks with PLECS equivalents and run the simulation model you’ll get the same zero crossing error in PLECS Blockset (PLECS Standalone works fine).
I suspect the main driver is that the “Relative Tolerance” value might be set too low such that it actually induces the excessive zero crossings in the output diode rectifier. Relaxing the current value of 1e-7 to something like 1e-5 allows the simulation to complete without the error message. The simulation also runs faster, with a negligible loss in accuracy. You can always use the Refine Factor setting to improve the waveform “shapes” while still maintaining the same level of solver accuracy.
Simply changing the relative tolerance allows one to simulate the undamped circuit (with R_Uin and R_Cr retained to eliminate state-source dependency errors).