I am running a PLECS simulation of an MMC with nearest level modulation and a discrete-time controller implemented inside a triggered subsystem. Right now, the trigger is generated by fixed periodic rectangular pulses. At the end of the control loop, the gate signals are delayed by one sample (to model the one-sample computation delay) before being sent to the switches.
I am aware of two ways to implement this one-sample delay:
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Using a Discrete-Time Delay block inside the triggered subsystem.
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Using a Pulse Delay block outside the triggered subsystem.
I originally used method (1), but I recently switched to method (2) and found that it results in significantly faster simulation. The output waveforms appear correct at first glance, however I am not fully confident in the equivalence of the two approaches.
The reason for my concern is a note in the PLECS documentation for the Pulse Delay block, which states: “Pulse Delay should not be used to delay signals that have a fixed sample time.”
My questions are:
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Does a signal coming out of a triggered subsystem (triggered by user-defined fixed periodic pulses) qualify as a signal with a “fixed sample time” in the sense meant by this warning?
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What is the underlying reason for this restriction, and what kind of error or artifact could arise if the Pulse Delay is used in such a case?
Did you have an algebraic loop in your model when using method 1? If there is an algebraic loop then a small exclamation icon in the lower right-hand corner of your model window will appear which will point you toward information about your model when you click it.
The difference would be the location of placing the delay inside your triggered (atomic) subsystem opposed to outside the subsystem. Placing the delay outside the subsystem will break an algebraic loop whereas placing the delay component inside the atomic subsystem will not.
The reason to not use a Pulse Delay for a fixed periodic signal is largely due to solver efficiency, not accuracy. As described in the documentation, the Pulse Delay records discrete changes of the input signal and projects these change events into the future. However, the discrete changes can occur at any moment in time and so record keeping of when exactly these events occurred is more complex. For a fixed sample time input we know exactly the size of the buffer we need and when the next event will occur. This delay_example.plecs model shows a case tuned to highlight the speed differences between the two approaches, which will produce identical outputs in this case. The results of the execution benchmarking are below.
So for cases where the input to a triggered subsystem has a fixed period then the Delay is most appropriate. However, if the event occurs with any timing variation then the Pulse Delay should be selected.
| Case |
Average Execution Time (s) |
| Discrete Delay |
5.4 |
| Pulse Delay |
6.9 |