Reducing Simulation Time for Large-Scale Circuits

General
1

I am currently working on a PLECS model in which the overall circuit size has grown significantly due to the inclusion of multiple subsystems and detailed component-level modeling. As a result, the simulation time has increased drastically, making time-domain simulations extremely slow and, in some cases, impractical for iterative analysis and controller testing.

I would like to seek guidance from the community on effective methods to reduce simulation time in the PLECS model I am working on . The model has been attached below . Any suggestions, references, or practical experiences on optimizing simulation performance in such scenarios would be highly appreciated.

Thank you in advance for your support.

TEST.plecs (185.8 KB) ( The associated .mat file is not being allowed to be attached here . )

2

Without the associated *.mat file I can make some general observations on your model.

The following makes a very large difference in performance:

  • The “Max step size” of the variable-step solver is set to 1e-6 - effectively turning your variable step solver into a fixed-step solver. Machine and control dynamics drive your model step size as you don’t have any high frequency converters in your model, meaning a larger minimum step size is more appropriate. You could likely set the “Max step size” to 1 second or higher and let the solver manage the sample hits.
  • The “Noise” source has a step size of 1e-6. That also forces the overall simulation step in your model. Set it larger or comment it out for speed.

These aren’t the main issues, but in many simulations will slow things down further.

  • There are many 1e9 resistive elements in your circuit that aren’t needed. Many of these are because of the machine model you chose. You should chose one of the VBR machine models which can operate with open windings and no snubber components. See the component documentation for help.
  • Changing the machine type and getting rid of the resistors may introduce an algebraic loop warning/error. Turn your continuous control systems into normal subsystems and not atomic subsystems to resolve.

However, once these are resolved there’s something else in your circuit causing it to go unstable. That is for you to debug. This guidance may be helpful.

The associated .mat file is not being allowed to be attached here.

You can try and change the extension of the *.mat file to a supported format, or embedded the required data into the PLECS model initialization commands.