How to correct out of phase current in a single phase grid connected system.
Are you asking how to implement a PLL or for an example? There are a couple demo models included with PLECS that include one if you search in the documentation (PLECS does have a library block for this too).
Yes I can see couple of the demos but haven’t been able to use it properly in my design. The current remains out of phase with the voltage. I will appreciate if my design could be looked into and possibly suggest how to achieve this correction.
10KW Design.plecs (887 KB)
Thank you for attaching your model. The issue is not necessarily with the PLL but with your overall control structure for the DC/AC inverter. You PI controllers quickly exceeds the available range of your modulator input and your modulation output saturates. It just so happens that the output current is not in phase with the grid voltage. I would suggest refining this control scheme first.
Thank you for your response. I will improve on that.