Dual active bridge closing the current loop

Hi,

I am designing 5kW DAB and I have a closed voltage loop working in all my power limits and voltage limits. I have some issues closing the current loop. I looked at the secondary side average current and feed it back to the PI controller I have. But the system becomes unstable. Tried various Ki and Kp gains but still the its is the same.

Any advice is appreciated.

Hi Kalana,

It would be helpful if you could share a model. For controller tuning, you can also use the PLECS Analysis tools to verify that you are achieving the desired system response.

I am also not entirely clear on your control structure. Is the voltage loop running in parallel with the current loop, or is the current loop the inner loop? Typically, you design the inner loop first. Once you achieve the desired performance there, you then close the outer voltage loop. The reason is that designing the outer voltage loop first can be misleading. Adding the inner current loop afterward will change the system dynamics, requiring you to redo the voltage loop design.

Hope this helps.

DAB_test24_Curr_loop_test1.plecs (198.6 KB)
yes agree!! I tried just using the inner current loop but still it not stable, I am not sure if I should use the periodic averaging block or the absolute value block in PLECS when i am measuring the current in my feedback loop.
DAB can be used only with the voltage loop but however current loop is preferred for faster response and current protection. Idea is, current loop be the inner loop and voltage be the outer loop.
Attached is the PLECS model

Hi Kalana, thanks for sharing your model. A couple of things I noticed:

  • The model is using a fixed-step solver. I would recommend switching to the variable-step solver.

  • When I switched to the variable-step solver, I noticed the maximum step size is set to 100 ns. I would recommend starting with a maximum step size of 1 ms and setting the relative tolerance to 1e-6. This allows the solver to run at an optimal rate while maintaining high simulation accuracy for your circuit.

For controller design, I suggest using the PLECS Analysis tools. Given your intended control structure, I would start by designing the current loop first using a fixed reference. Once that is working as desired, you can then introduce the voltage loop and again use the Analysis tools to optimize its performance.

Hope this helps!

Hi Munadir,

Where can I find the PLECS Analysis tool ? And for the current loop PLECS recomend to use the running average PLECS block or the absolute value PLECS block ?

Thanks

Hi Kalana,

Here is a link to our tutorial on how to use the PLECS analysis tools. You may also find this webinar helpful for your work Webinar: Control Design Using the Small-Signal Analysis Tools | Plexim

Sorry, I missed this part earlier. This depends on how you plan to measure the secondary current in hardware. My recommendation is to implement the model as closely as possible to the intended hardware implementation.

If you plan to use filtering to mitigate noise in your system, it is important to include this in the model, either through electrical components or a transfer function block. The filter will have a significant impact on loop stability, so capturing it accurately is critical.

Based on your current model, it appears that the intent is to sample the rectified secondary current directly and use peak sampling for control. Is this what you expect to implement in the hardware?

Hope this helps.