Error - Generate 3 X 120 phase shifted PWM

Hello All,

I am trying to generate 3 PWM which are 120degree phase apart in Fixed step simulation model and having trouble with choosing sample time.

PWM generator high resolution period as sample time for 65khz signal which create issue in choosing integer multiple sample times !

PLECS MSG : Required sample time period (3.846153846153846e-06)

Any help would be much appreciated.

Thanks in Advance

Please upload your model to the forum ,only in this way, can others help you examine your error.

Hello ! Thank you for the reply.

Attached the PLECS stand alone model

PWM_PhaseShift.plecs (9.16 KB)

Hello ! Thank you very much for the reply. Attached the model

PWM_PhaseShift.plecs (9.16 KB)

Why do you require a fixed step simulation for this model?

And you really mean to feed the modulator an index of 0.5? If the reference signal is sinusoidal, for example, you can simply vectorize the phase parameter for the Sine Wave Generator block, as, e.g. [0 -2pi/3 2pi/3].

Hello Kris !

Thanks for the reply.

I am trying to integrate the PLECS plant with my Simulink model which has requirement to run in fixed step.

Currently just to demonstrate, 0.5 value fixed value is used to see whether I can generate PWM with 50% duty cycle and phase shift it.

When using a fixed time step, you have to make sure that all fixed-step events in the model are an integer multiple of the defined fixed step size parameter. With Tsw=1/65e3:

The PWM modulator requires a fixed time step that’s an integer divisor of Tsw/4 (your current time step of 3.846e-06 from the error message).Phase shifts require a time step that’s an integer divisor of Tsw/3 and 2*Tsw/3.You probably want something less than that in order to accurately generate the PWM waveforms for different duty cycles. The PWM duty cycle quantization is directly linked with the fixed step size.So with the points above, your fixed step solver size should be an integer divisor of Tsw/12 in order to eliminate the error messages. The divisor factor determines your PWM quantization error. Attached is a model that shows this. Note it uses variables set in the Model Initialization Commands.Using a variable step solver simplifies this process greatly. It might also run faster by avoiding unnecessary solver steps. Also note there’s no provision against having fixed-step periodic events when using a variable-step solver. Please reconsider if there’s another way to model the fixed-step portion of your system in a way that’s compatible with a variable-step solver.

Lastly, you probably want to implement the phase delay by shifting the carrier as you would in most hardware, not by delaying the PWM signals, as shown in the attached model.

PWM_PhaseShift_BL.plecs (12.8 KB)

Hello Bryan,

Thank you very much for the detailed information. Much appreciated.