High current stress across all the components in a DAB converter

General
1

Hello,

I am working on an isolated DAB converter (used as a fractional/partial power converter) for buck operation in PLECS. So, the working principle is that the DAB will process a fraction of the total power. It is connected in parallel with the input, and the DAB’s output is connected in series with the input. So, the DAB will inject a negative voltage to the input, and the bus voltage will be Vbus= Vsource- Vdab. My goal is to get 300V at the bus. For that, I have to adjust the phase shift.

The topology consists of:

  • Primary full bridge: S1, S2, S3, S4
  • High-frequency transformer
  • Leakage inductance in series with the transformer
  • Secondary full bridge: S5, S6, S7, S8
  • Four additional AC switches on the secondary side (to reverse the polarity):
    • 236 and 256 controlled by signal A
    • 240 and 252 controlled by signal B
  • Output capacitor and resistive load

All semiconductor devices are MOSFETs with antiparallel diodes.

Switching Pattern

Primary bridge:

  • S1 and S4 are complementary to S2 and S3.

Secondary bridge:

  • S5 and S8 are driven together.
  • S6 and S7 are driven together.
  • S5/S8 are complementary to S6/S7.

AC switches:

  • A controls switches 236 and 256.
  • B controls switches 240 and 252.
  • A and B are complementary.

Therefore:

State A:

  • 240 = ON
  • 252 = ON
  • 236 = OFF
  • 256 = OFF
  • S6 = ON
  • S7 = ON
  • S5 = OFF
  • S8 = OFF

State B:

  • 236 = ON
  • 256 = ON
  • 240 = OFF
  • 252 = OFF
  • S5 = ON
  • S8 = ON
  • S6 = OFF
  • S7 = OFF

Problem

The transformer primary and secondary winding, inductor voltage, inductor current, and all the switches have extremely high current across them. How do I minimize them? I have attached the simulation file for your convenience.

Your help would be greatly appreciated! Thank you in advance.

AC_Switches.plecs (100.8 KB)

Screenshot 2026-06-17 115936
Screenshot 2026-06-17 1159361816×926 120 KB

3

Hi Arnob,

It is not entirely clear whether you are asking for control/design advice or whether the simulation itself is not behaving as expected.

Is this control strategy based on a paper or publication that you have come across? If so, you may be able to get more targeted guidance by reaching out directly to the authors, as they will be most familiar with the assumptions and design tradeoffs behind the approach.

The only general recommendations I can offer are:

  • Increase the inductance values to reduce current ripple and peak currents.
  • Increase the switching frequency, which can also help reduce current ripple.
  • Investigate a phase-shift strategy that minimizes peak currents while still maintaining the desired power transfer.

For this type of topology, some form of Triple Phase Shift (TPS) control may be worth exploring, as it provides additional degrees of freedom that can be used to optimize current stress and power flow.

Hopefully these suggestions give you some directions to investigate as you continue developing and refining the control strategy.

4

Hi Munadir,

Thank you for the recommendations. I am primarily looking for control and design guidelines that can help me achieve my objectives with this topology. I will definitely look into TPS and investigate whether it can help reduce the current stress while maintaining the desired power transfer.

Thank you again for your insights.