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Discrepancy Between Offline/HIL-to-HIL and RT Box–STM32G474RE Results in Closed-Loop GFM Islanded Control
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1
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24
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May 4, 2026
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Generation of Phase-Shifted Carrier PWM Signals
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1
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36
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April 29, 2026
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The parallel capacitance issue of the full-bridge LLC resonant converter model
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1
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33
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April 23, 2026
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Shoot-through in full-bridge inverter with RT Box and TI C2000 when using Switch block
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1
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34
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April 20, 2026
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Signal mismatch between RT Box Analog Out and DSP ADC in external mode
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2
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39
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April 20, 2026
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Dq transformation in HIL to HIL Simulation oscillated
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2
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43
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April 16, 2026
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How to generate a high frequency sin wave by using FPGA?
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1
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38
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April 7, 2026
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Error in build step #2 (Make): Make process exited with code 2:
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2
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51
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April 1, 2026
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Inquiries regarding RT Box HIL system
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8
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547
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February 18, 2026
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Real Time Simulation Set Point Value is Not the Expected Value
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1
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30
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February 12, 2026
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Connecting Output Port from STM32 Analog Output to Analog Input RT Box
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1
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217
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February 2, 2026
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Complementary PWM Signals overlaps at Digital Input Pins at RT Box 2
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4
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745
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January 21, 2026
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Scaling and Offset in RT Box and STM32
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3
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704
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January 21, 2026
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Challenge modeling switch S3 in 4-Port DC-DC Converter on RT Box 1 (Sub-cycle Averaging issue)
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3
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901
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December 10, 2025
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Help Creating load flow simulation for 3 phase powered commercial building
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10
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876
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November 7, 2025
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Activation of the action qualifier option on plecs
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3
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414
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October 16, 2025
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Interleaving close loop
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3
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297
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October 9, 2025
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Controller Memory Data Error
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1
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431
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September 29, 2025
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RT Box — modulation index (duty cycle) update timing with PWM Out (Variable), Update = Immediately
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5
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715
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September 26, 2025
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Powerstage Protection of RTBox in Simulation
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2
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310
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September 18, 2025
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How to Use PWM Capture with Differential 5V Gate Signals in RT Box
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1
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110
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September 10, 2025
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How to represent bidirectional Mosfet switches using sub cycle average model
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6
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642
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August 23, 2025
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Real-Time Simulation Results Differ from Offline
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2
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166
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August 14, 2025
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I am currently working on building my RT Box coder for implementing phase shift modulation in a three-phase dual active bridge design. As part of the process, I need to generate a phase delay of 60° between each signal. Despite trying various approaches w
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17
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348
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July 28, 2025
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RT_Box HIL simulation error
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3
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230
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July 28, 2025
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About the power-hardware-in-the-loop test and RT-BOX
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2
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1103
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December 9, 2022
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RT Box: Illegal transition conditions in forced commutation for topology 52_0
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7
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269
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July 15, 2025
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LAUNCHXL-F28069M Synchronize output through EPWMSYNCO
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6
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809
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June 10, 2025
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PWM(Variable) synchronize issue
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8
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846
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May 20, 2025
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PWM variable RTbox block
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1
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222
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May 15, 2025
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