Inquiry Regarding Hardware-in-the-Loop (HIL) Simulation Issues

Hello, I have developed a hardware-in-the-loop simulation model for a single-phase cascaded H-bridge converter. In this setup, the main circuit is executed on an RT-Box 3, while the control algorithm is deployed on a TMS320F28069 DSP device. The model operates correctly in offline simulations within the PLECS software environment. However, during HIL execution, the controller fails to generate the correct sinusoidal pulse-width modulation signals, as illustrated in Figure 1. Consequently, the AC-side voltage and current waveforms exhibit significant distortions, as shown in Figure 2.

Figure 1 SPWM (sinusoidal pulse‑width modulation) signal waveforms

Figure 2 AC‑side voltage and current of the converter

I would like to inquire about the possible root causes of this issue and seek guidance on the appropriate diagnostic and troubleshooting procedures to resolve the observed anomalies.

Thank you for your attention. I look forward to your valuable suggestions. This is my model:

SigPET_3.plecs (206.4 KB)