Technical Support Request: Variable-Step Simulation Stalling in a Three-Phase Cascaded SST Model (PLECS 5.0.6)

Dear Plexim Technical Support Team,

We are currently conducting research on the simulation of a solid-state transformer (SST) using PLECS. Our system adopts a three-phase, two-cell cascaded topology, with a rated DC bus voltage of 800 V.

The control strategies employed in our system are as follows:

  • Rectifier Stage: Cascaded voltage and current dual-loop control, employing unipolar frequency-doubling PWM with phase-shifted carriers.

  • Isolation Stage: Closed-loop voltage control of the dual-active-bridge (DAB) converter.

  • PLECS Version: 5.0.6

The detailed circuit and controller parameters are provided below.

1. Circuit Parameters

L = 6.6e-3;       % Grid-side filter inductance
C = 4000e-6;      % H-bridge output capacitor
fs = 10e3;        % Switching frequency
V = 700;          % Initial H-bridge voltage
Udc_ref = 800;    % Rated H-bridge voltage

2. Voltage Outer-Loop Controller

Kpu = 1;          % Proportional gain
Kiu = 50;         % Integral gain

3. Current Inner-Loop Controller

Kpi = 5;          % Proportional gain
Kii = 500;        % Integral gain

4. DAB Converter Parameters

Vin = 800;        % DAB input voltage
Vout = 800;       % DAB output voltage
fs_DAB = 30e3;    % DAB switching frequency
L_DAB = 18e-6;    % DAB power inductor
C2 = 200e-6;      % DAB output capacitor
Resr = 1e-3;      % Equivalent series resistance
N1 = 1;           % Transformer primary turns ratio
N2 = 1;           % Transformer secondary turns ratio
KDAB_p = 1e-4;    % DAB voltage controller proportional gain
KDAB_i = 0.1;     % DAB voltage controller integral gain
vout_ini = 0;     % Initial DAB output capacitor voltage
RS = 1e-3;        % Series resistance
Lm = inf;         % Magnetizing inductance

5. Problem Description

We have encountered an issue when running our SST simulation in PLECS.

Specifically, the simulation stalls or becomes extremely slow when using a variable-step solver, whereas it runs successfully with a fixed-step solver.

Our objective is to ensure that the model can also operate correctly and efficiently under variable-step simulation conditions.

We would greatly appreciate your assistance in identifying the possible causes of this issue and providing recommendations on how to resolve it.

In particular, we would like to understand whether the problem is related to the solver configuration, switching events, control system implementation, or other aspects of the model.

The relevant PLECS project files and screenshots are attached for your reference.

Thank you very much for your time and technical support. We look forward to your guidance and suggestions.

Best regards,

SST Research Team

SST.plecs (780.7 KB)

The continuous controllers change move faster than the PWM carrier waves. PWM action causes the controller action to move in the other direction causing toggling. With naturally sampled PWM you have implemented there can actually be many hundred PWM compare events per switching period, which is not what you desire and causes the simulation to come to a stall. The fixed-step solver “jumps” over all of these compare events that should be happening according to the logic in the circuit. You can see these if zoom in extremely close to the stall point.

The fix is simple, either use a regularly sampled PWM block or put a ZOH with a sample time equal to 1/fsw or 0.5/fsw in front of the modulator. You need to do this on each phase and on the DAB. This also may point to underlying control issues, but should at least allow your simulation to proceed.

I have got it resolved now. Thank you so much for your help!

Hello, I have another question. When we normally run offline simulations in PLECS, in order to make our results match the waveforms in RT Box 3, should we use variable-step or fixed-step offline simulation? If using fixed-step, would you recommend 1e-6 or 2e-6?:grinning_face: