Hi,
I’m building a 6-phase synchronous generator feeding a diode rectifier, intended to run in codegen mode with a fixed-step solver (Tstep ≈ 2.5 µs) for a real-time hardware target.
The generator is a custom model: the machine terminals are driven by controlled current sources inside abc->dq transformation blocks (dq equivalent circuit computes the currents, which are injected at the terminals, and the terminal voltages are measured back). The terminals connect directly to a 3-phase diode rectifier with a DC-link capacitor and load. The diodes are already set to Non-Ideal.
The problem: I observe high-frequency oscillation (“chattering”) on the generator terminal voltage waveform. When I zoom in, the voltage toggles between 0 and full scale (±5000 V) on a per-step (2.5 µs) basis, so it is clearly a numerical oscillation, not a physical waveform. The chattering occurs around the diode commutation / current zero-crossing instants, and because a 6-phase rectifier commutates so frequently, it covers a large portion (~2/3) of each cycle.
What’s puzzling — the behavior depends on a parallel terminal resistor: I placed a parallel resistor (R_parallel) at the generator terminals and swept its value:
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R = 1 kΩ → clean (no chattering), but with significant conduction loss, which I want to avoid.
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R = 10 kΩ → chattering appears.
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No resistor → chattering appears, but the simulation still runs (current and DC voltage build up normally to the rated value).
Question 1: Why does only R = 1 kΩ remove the chattering, while both R = 10 kΩ and no resistor show it? And why does the simulation still run correctly (currents/power fine) even without the resistor, despite the voltage chattering?
What I’ve already tried (no success):
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Sweeping the “Allow state-space inlining” option (on/off) over ~80 combinations of the 8 controlled voltage sources, with the current sources fixed to ZOH+on or FOH+on — no clear trend, chattering remained.
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RC snubber across the terminals (e.g., R+C in series) — did not resolve the commutation chattering.
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Inserting a unit delay in the feedback path — made overshoot worse.
The reference that led to my second question: While investigating, I opened the PLECS built-in Induction Machine model. It uses a very similar terminal interface (controlled current source + voltage measurement), but it has no parallel terminal resistor and runs cleanly under fixed-step. I noticed two things inside it:
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It is built as a Configurable Subsystem that switches its schematic based on “solverType.”
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It contains a block labeled “Step Size Compensation” (which internally contains a Solver Configuration block).
Question 2: What exactly is the role of this “Step Size Compensation” block? Is it what allows the built-in machine to run cleanly with a diode rectifier under fixed-step, without needing a parallel resistor? And is it something I can apply to my custom 6-phase model, or is it tied to the internal solverType-specific implementation of the library machine?
Question 3: More generally, for a custom machine model with current-source terminals feeding a diode rectifier in fixed-step codegen, what is the recommended way to eliminate this commutation chattering without adding a lossy parallel resistor?
Any guidance would be greatly appreciated. Thank you!
six_phase_gen.plecs (345.3 KB)




