Dear all,
I want the F28379 to stop PWM output when there is an overcurrent, but I couldn’t achieve this using Powerstage Protection.(maybe I use the wrong way)
As far as I understand, Powerstage Protection seems to only detect GPIO signals to enable PWM output. If you know of any other methods to achieve overvoltage/overcurrent protection, please share them; I would be very grateful.
BR,
PCL
Hi PCL,
Have a look at the TI C2000 demo model “Buck Converter BOOSTXL.” This model implements an overcurrent protection scheme where the MCU monitors the inductor current and uses an analog trip zone to disable the PWMs when an overcurrent event is detected.
The following excerpt from the model description explains the behavior:
In addition, a protection function is implemented within the Powerstage Protection block. An analog trip value of 6A is defined using the Coder + Coder options + Target tab + Protections parameter. When the inductor current exceeds this value the trip signal A is triggered. A reaction to this trip signal A is defined in the Protection tab of the Powerstage Protection block.
This model uses the MCU’s built-in comparator. If you are instead using a dedicated external comparator IC, you would need to use Trip Zones 1, 2, or 3, which are intended for digital signals.
Hope this helps!
Hi Parth,
This is a great idea, but it may not be fast enough to handle very fast fault conditions. Where I do see it being useful is in distinguishing between soft faults and hard faults.
A soft fault could be handled through the software protection scheme you have implemented. This approach is intended to keep the system safe, but it only becomes active when the interrupt service routine is running. For example, with a 100 µs ISR period, the system is effectively blind between ISR executions. During that time, the hardware could potentially be severely damaged. In a PFC system, a scenario where this could be useful is a sudden load disconnect. In that case, the bus voltage would rise, and the software protection may be fast enough to prevent damage.
A hard fault, on the other hand, must be handled through a hardware-based protection scheme, such as dedicated comparators with digital trip zones or analog trip zones, as mentioned earlier. In a PFC system, this would be critical for events like line surges, where protecting the FETs requires shutting down within a few microseconds for voltage faults or even a few hundred nanoseconds for current faults.
Hopefully this helps with your design.
