Hi，
as shown in the figure, I am working on a project related to the totem pole without a bridge PFC. （Purple represents the output voltage waveform, dark blue represents the input voltage waveform, and light blue represents the input current waveform.）The inductor current operates in continuous current mode. However, during operation, it was found that there are abnormal jumps occurring on both the peak and valley sides of the current. The corresponding time is also the peak and valley of the output voltage, and it does not occur at the zero-crossing point of current and voltage. Neither reducing the system bandwidth nor adding a low-pass filter to the sampling can eliminate this phenomenon. Could you please tell me what might be the cause of this jump and how to solve it?
Hi Papsi,
This is a difficult problem to solve unfortunately and I can only provide some advice. If I were in your shoes here are the steps I would take:
- Determine if this is a controls issue
- I would first focus on the Voltage and Current loop design using frequency analysis via small signal perturbation
- Prior to going on the HW I would develop a PLECS model that operates in both AC/DC mode and DC/DC mode and ensure these two loops are tuned as you desired. For a totempole PFC this typically means a current loop with bandwidth in the kHz and a voltage loop with bandwidth at around 10Hz. See this excellent discussion by Dr. Shirsavar who talks about this design process. I have utilized this myself to optimize HW performance.
- Once the DC/DC design is done and the simulation and HW results are matching I would only then introduce the “reference arithmetic” block → i.e. the block responsible for taking the DC current setpoint from the outer Voltage loop and converting it into an AC current reference to achieve unity power factor. Again I would start with PLECS and only when I’m satisfied with the performance would I try with HW.
- An important thing to note is that it is important to include details in your PLECS model that might potentially impact your controller performance. Things that come to mind any sensing gains and filters, etc. Maybe your inductor is saturating and that will have a big impact.
- If that is not the case then the next question would be is your PLECS simulated controls the same as you have on your hardware. If you are using the PLECS code generation then they are going to be in sync but if you are handcoding then you’ll have to utilize other techniques to ensure there is no implementation error. One option could be to use SIL as discussed in Digital Controller Design and Implementation Workflow in PLECS .
- Finally, if all of these are in sync then the next question is whether your control algorithm is executing at a the rate you are expecting or are you running into overrun issues. Again with PLECS code generation this can be easily determined using the CPU load block. However, with handcoding you’ll need to utilize other techniques (e.g. toggling GPIO at the start and end of your ISRs to measure execution time and frequency).
All the above are targeted towards ensuring your controls is working properly. There is of corse the probability that the issue is in your HW which is a much more complicated problem to find - but I would break down the problem into small segments and make sure each piece is working properly.
A few things that pop out from your graph:
- is your input source (CH 1) actually working as you expect. Your input waveform looks a bit distorted to me. Also the voltage level looks like you are using ~200VAC (since peak is a little below 300VDC). Typically I would expect testing to occur at 110/120 VAC or 230/240VAC since those are the nominal grid voltages and so that just stuck out for me.
- CH4 - something very strange is happening there where the signal goes from positive peak to negative peak. So I would focus on that.
Hope this helps!