If the phase shift is variable and the gate pulses are generated in Simulink, what is the recommended method to transfer/generate these phase-shifted gate pulses for a PLECS power circuit?

General
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I am simulating a resonant converter with MATLAB/Simulink control and a PLECS power circuit. The switching frequency is 100 kHz.

I am generating the gate pulses in Simulink. I generate the phase-shifted gate signals by using Transport Delay blocks. The delay value is calculated from the required phase shift.

I have verified the gate pulses in both MATLAB/Simulink and PLECS, and they appear to have the same:

switching frequency

phase shift

pulse width

dead time

However, I have a problem with the simulation results.

The same converter works correctly when simulated completely in MATLAB/Simulink. But when I use Simulink for gate-pulse generation/control and PLECS for the power circuit, the output voltage is incorrect.totally distored give me proper approach to correct it

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I would first have a closer look at how the PWM signals are generated.

In particular, I would not recommend using the Transport Delay block to generate phase-shifted PWM signals. The MATLAB documentation explicitly states that the input to this block should be a continuous signal. The same applies in PLECS: our Transport Delay block is also intended for continuous signals and is not the recommended way to shift PWM gate pulses.

Instead, I would recommend generating the PWM signals directly based on the desired switching frequency and phase shift, rather than generating one PWM signal and delaying it afterwards.

In PLECS, for example, we would typically use the Variable Phase PWM block for exactly this purpose. The phase shift is provided directly as an input to the PWM generator, so the switching events are generated at the appropriate simulation times.

You can find an example of this approach in our Phase-Shift DC/DC Converter with Integrated Magnetics demo model:

Before investigating the variable phase shift further, I would also recommend running both models in open loop with a fixed phase shift first. This helps verify that the models behave identically under the same operating conditions and that there is no modelling issue in the PLECS circuit itself.