Small-Signal Modeling and Control of LLC Resonant Converters in PLECS

[Munadir_Ahmed]

LLC Resonant Converter Model and Controller Overview in PLECS

Different LLC resonant converter control strategies are examined in PLECS, focusing on direct frequency control and charge control and how their small-signal behavior differs. The control-to-output transfer function is obtained directly from switching models using the PLECS small-signal Analysis Tools, allowing key dynamic characteristics to be observed beyond time-domain waveforms. These differences naturally carry through to controller tuning, where the underlying plant dynamics influence achievable bandwidth, gain, and interaction with the resonant tank.

Figure: Half-bridge LLC converter model with controller subsystem

The figure above shows a half-bridge LLC converter with an ideal DC voltage source at the input and a purely resistive load at the output. The PWM signals are generated by the controller subsystem. This subsystem implements both direct frequency control and charge control strategies, which measure the input and output voltages. The charge control strategies additionally use the resonant capacitor voltage as part of the control law.

Open-Loop Control-to-Output Transfer Functions

Direct frequency control is the traditional strategy used in LLC converter control, where a voltage regulator directly sets the switching frequency of the PWM module, which operates with a 50% duty cycle. With this strategy, the control-to-output transfer function varies significantly with operating conditions. As highlighted in [1], it consists of a double pole whose frequency depends on f_n , the ratio of the switching frequency to the resonance frequency of the leakage inductance and resonant capacitor. At or below f_n = 1 , the double pole is at a relatively low frequency. As f_n increases beyond unity, the double pole shifts to a higher frequency, while a single pole appears at low frequency. This behavior makes direct frequency control challenging to tune for converter designs that require wide input, output, and load ranges.

Charge control of LLC converters exhibits a different behavior. Similar to peak current control in other DC/DC converters such as the buck converter, the control-to-output transfer function becomes effectively first order and largely independent of operating conditions [2].

Figure: Open-loop control-to-output transfer function for direct frequency and charge control strategies

In the figure above, the converter is operated in open loop with input and output conditions set close to resonance f_n = 1 . For the direct frequency control strategy, the double pole appears around 4.8 kHz. For the charge control strategy, the system behaves like a single-pole system with the pole located around 1.7 kHz. Additional poles exist at much higher frequencies, but they have little impact on controller design [2].

Note: For the direct frequency control strategy, the control-to-output transfer function is 180 degrees out of phase. In other words, as the switching frequency increases, the output voltage decreases. This behavior is reflected in the phase plot by a 180-degree phase shift from the origin at the beginning of the Bode plot. For the charge control strategy, the output voltage is in phase with the control parameter, so the phase starts near 0 degrees.

Closed-Loop Controller Design

Direct Frequency Control of an LLC Converter Using PI Voltage Mode Control

The direct frequency controller is implemented using a simple PI-based voltage mode controller. The figure below shows the architecture, where the output voltage is compared against a target value, and the PI controller adjusts the switching frequency to minimize the error.

Figure: Direct frequency control architecture using a PI voltage mode controller

The figure below shows the line and load response of the half-bridge LLC converter using the PI voltage mode controller, designed for approximately 100 Hz bandwidth at the minimum input voltage of 380 V and maximum load. The loop dynamics vary significantly across operating conditions. Small-signal responses at 400 V and 420 V suggest that the bandwidth could be increased, but at 380 V the loop exhibits a low-damped double pole, necessitating a conservative design. To ensure stability across all conditions, the controller bandwidth is intentionally limited. While higher-order controllers, such as a two-pole, two-zero compensator, could increase bandwidth, the challenges of a highly variable plant remain.

Figure: Closed-loop response at different loads for input voltages: (a) 380 V, (b) 400 V, (c) 420 V

Design Considerations:

• Simple and well-known controller requiring only output voltage sensing
• Limited bandwidth due to the complex dynamics of the converter across line and load conditions

Single-Ended Charge Control Strategy for LLC Resonant Converters

The charge control strategy can be implemented in several different ways. One such implementation is the single-ended charge control strategy proposed in [3]. The architecture of this approach is shown below. It consists of an outer voltage loop implemented with a PI controller to regulate the output voltage to its reference. The voltage loop sets the target peak charge reference for the sensed resonant capacitor voltage.

Figure: Single-ended charge control strategy architecture

A system-level model of the inner charge control loop for the single-ended strategy is shown below. A reference generator takes the peak voltage reference from the outer voltage loop and optionally overlays a stabilizing ramp to mitigate sub-harmonic oscillations, similar to traditional peak current mode controllers. This modified reference is compared against the measured resonant capacitor voltage, and the comparator output is fed to the modulator. The modulator is implemented as a state machine and is responsible for generating the half-bridge gate-drive signals.

Figure: Inner-loop overview

After an initialization period, the control strategy can be summarized as follows:

• HbHighSideOnMin: The high-side switch is turned on and the on-time counter is started. The modulator remains in this state for a minimum on-time defined by the application. Once the minimum on-time expires, the modulator transitions to HbHighSideOn if the comparator is low, or to HbLowSideOn if the comparator is high.
• HbHighSideOn: The modulator remains in this state until either the comparator asserts or a maximum on-time expires, at which point it transitions to HbLowSideOn.
• HbLowSideOn: Before entering this state, the high-side switch is turned off and the low-side switch is turned on. The previously measured high-side on-time is used to set the duration of this state, resulting in an effective 50% duty cycle for the LLC converter.

Note: To simplify the modulator state-machine definition, dead-time insertion is handled externally, for example by the Dead-Band module on a TI C2000 MCU.

Figure: Modulator state machine

The figure below shows the line and load response of the half-bridge LLC converter using the single-ended charge control strategy. The controller is designed for approximately 8 kHz bandwidth at the nominal input voltage of 400 V and maximum load. The loop dynamics do not vary significantly across operating conditions, resulting in a first-order system that enables higher achievable control bandwidth.

Figure: Closed-loop response at different loads for input voltages: (a) 380 V, (b) 400 V, (c) 420 V

Design Considerations:

• Simplified first-order system across line and load conditions
• Requires sensing of the high-voltage, high-frequency resonant capacitor voltage
• Implementation requires either a dedicated ASIC or advanced microcontroller features (e.g. the CLB module on TI C2000 MCUs) to support pulse copy functionality

Dual-Ended Charge Control Strategy for LLC Resonant Converters

An alternative implementation to the single-ended charge control strategy is the dual-ended approach. The architecture is shown below. The outer voltage loop sets a target delta charge reference, which is added to and subtracted from half of the input voltage to define the upper and lower thresholds for the resonant capacitor voltage.

Figure: Dual-ended charge control strategy architecture

A system-level model of the inner charge control loop for the dual-ended strategy is shown below. Similar to the single-ended approach, a pair of reference generators and comparators are used to evaluate the resonant capacitor voltage against upper and lower thresholds. The comparator outputs are fed to the modulator, which generates the half-bridge gate-drive signals.

Figure: Inner-loop overview

The dual-ended modulator state machine is largely identical to the single-ended version, with the key difference being the handling of the low-side gate drive. The low-side switch follows the same control logic as the high-side switch, eliminating the need for a pulse copy and a separate on-time counter.

Note: Dead-time insertion is handled externally, for example by the Dead-Band module on a TI C2000 MCU.

Figure: Modulator state machine

The figure below shows the line and load response of the half-bridge LLC converter using the dual-ended charge control strategy. Similar to the single-ended implementation, the loop dynamics do not vary significantly across operating conditions, enabling a high-bandwidth, first-order control design.

Figure: Closed-loop response at different loads for input voltages: (a) 380 V, (b) 400 V, (c) 420 V

Design Considerations:

• Exhibits the same loop dynamics advantages as the single-ended approach while also requiring sensing of the resonant capacitor voltage
• Does not require advanced microcontroller features (e.g. pulse copy) but requires two comparators for upper and lower threshold comparison

Automated Analysis Using Simulation Scripts

The model includes two simulation scripts, one for open-loop analysis and one for closed-loop analysis. Each script automatically configures the model for the selected control strategy, so no manual reconfiguration of the controller or operating mode is required prior to running the analyses.

The open-loop script evaluates the control-to-output transfer function for each control strategy at a nominal operating point by automatically switching the controller into open-loop operation and executing the corresponding frequency response analysis.

The closed-loop script performs automated line and load sweeps across multiple input voltages and load conditions. For each control strategy, the script configures the appropriate closed-loop settings, applies a small-signal perturbation, and computes the closed-loop frequency response at each operating point.

Users can optionally enable saving of the frequency response traces by setting the parameter saveAnalysisTraces to true in the ClosedLoopTF simulation script. When enabled, the script saves the frequency response data for each controller and input-voltage case, enabling offline comparison and post-processing. When saveAnalysisTraces is set to false, the frequency response scope is cleared after each input-voltage condition, so only the most recent results remain visible. This behavior can be modified directly in the simulation script if a different visualization workflow is desired.

References

1. S. Tian, F. C. Lee, and Q. Li, Equivalent Circuit Modeling of LLC Resonant Converter, IEEE Transactions on Power Electronics, vol. 35, no. 8, pp. 8833–8845, 2020.
2. Z. Hu, Y.-F. Liu, and P. C. Sen, Bang-Bang Charge Control for LLC Resonant Converters, IEEE Transactions on Power Electronics, vol. 30, no. 2, pp. 1093–1108, 2015.
3. A. Li, D. Guo, P. Luong, and C. Jiang, Digital Control Implementation for Hybrid Hysteretic Control LLC Converter, Application Note, Texas Instruments, C2000 Microcontrollers.

Software Requirements

PLECS Standalone 5.0 or newer

HalfBridge_LLC_ControlStrategies_With_SmallSignalAnalysis.plecs (240.1 KB)