When your controller subsystem is modeled using a CodeGen simulation (i.e. the C-Code is generated and discretized) then it is unstable, while it is stable for a continuous time domain simulation. See the screenshot below showing the Vpcc feedback for this scenario.
This points to an issue in the parameter selection or control structure for you to debug. You can debug this in simulation. I can see Vdref jumping around. Adding more filtering in the Q calculation helps, but it still shows oscillations after a longer simulation run.
Other less critical issues:
- The integrator blocks in the APC and VSG do not have anti windup and do not have angle wrapping for the angle generation as noted in a comment on a previous post: “Another issue in your model worth pointing out is the role of the integrator blocks generating an angle. Those should have wrapping enabled from 0-2*pi. The issue will manifest for longer runs due to round-off error when a very small value (increment) is added to a large value (integrator state).”
- I suspect algorithm may not work well in the presence of noise, sensor error, or DC offset.
