When should zero-order hold be adopted?

1

hey, I am studying using plecs, and I meet a problem that I don’t know when zero-order hold should be adopted,

the example is attached, and it can run without zero-order hold, but when ZOH is added, the waveforms is bad,

why? And can you find other questions in this simulations?

Thank you

best wishes

2

It seems the example file was not correctly attached. Could you edit your post to include it?

3

sorry, maybe my vpn has problems, and now it’s been attached.

single phase.plecs (29.7 KB)

4

The main issue with the controller here is that your PI gains are not tuned to your system.

To illustrate this, remove the ZOH block and compare the output of the PI block, the triangular carrier, and the PWM output. You’ll notice that the output of the PI regulator is changing faster than your PWM carrier. The effective frequency looks 3-4x higher than your desired frequency of 20kHz. The modulation output changes several times per switching period. This is not desirable.

Adding the ZOH block prevents the error input of the PI regulator from changing faster than the switching frequency. The result is then the PI regulator output toggles between max and min duty cycle.

5

Thanks for your answer, and can you tell me how to modify the PI?

6

This is more of a general engineering question rather than a specific PLECS issue. There are many resources on the topic, so I suggest you do your own independent research or discuss with your colleagues.