|
Welcome to PLECS User Forum! :wave:
|
|
0
|
1295
|
July 4, 2024
|
|
C-Script Blocks Prevent DSP Flashing on LAUNCHXL-F28379D
|
|
7
|
29
|
June 15, 2026
|
|
Discrepancy between offline simulation and RTBox2 real-time test results for photovoltaic MPPT model
|
|
3
|
40
|
June 15, 2026
|
|
Simulation Vienna Rectifier
|
|
1
|
19
|
June 15, 2026
|
|
Cyclic behavior during switching. Switches that bounced, plese help
|
|
2
|
9
|
June 15, 2026
|
|
C block memory error (0xc0000005) causing simulation crash and strange behavior (fluctuations, restart required)
|
|
1
|
18
|
June 12, 2026
|
|
Sample time error
|
|
1
|
21
|
June 12, 2026
|
|
Pulse generator cannot output pulses normally when the phase delay is too small
|
|
2
|
45
|
June 12, 2026
|
|
Why does this simulation give completely different results between offline and on-hardware(HIL)?
|
|
2
|
30
|
June 12, 2026
|
|
How to implement a dam converter with an active front end in Plexim standalone
|
|
1
|
21
|
June 11, 2026
|
|
Why does this simulation give completely different results between offline and on-hardware (HIL)?
|
|
1
|
76
|
June 11, 2026
|
|
Problems encountered when RT Box is used as the controller
|
|
15
|
106
|
June 11, 2026
|
|
PWM (Variable) syn among different frequency
|
|
7
|
125
|
June 11, 2026
|
|
Expected HIL Results are Diferent from Simulation Results in RTBox 1 for Nanostep Model
|
|
1
|
43
|
June 9, 2026
|
|
How can I implement a 3-level flying capacitor converter on RT Box using PWM Capture and sub-cycle average models?
|
|
9
|
92
|
June 9, 2026
|
|
PLECS linear interpolation and linear extrapolation strategies
|
|
4
|
51
|
June 9, 2026
|
|
Inconsistency between the original waveform and the waveform after Analog Input
|
|
5
|
50
|
June 9, 2026
|
|
HIL with TI C2000 (28379D) + RT BOX1 – How to control two converters using TI C2000 Target Support?
|
|
3
|
50
|
June 5, 2026
|
|
Grid-Forming Inverter Stable in Offline Simulation but Unstable When Implemented in RT Box HIL Simulation
|
|
2
|
49
|
June 4, 2026
|
|
Chattering in 6-phase generator + diode rectifier under fixed-step codegen — role of parallel resistor and "step size compensation" block?
|
|
1
|
35
|
June 4, 2026
|
|
How to make PLECS PWM Out/PWM Capture equivalent to a custom PSC-PWM with Relay?
|
|
3
|
96
|
June 3, 2026
|
|
From Behavioral to SPICE: Building Flyback Models That Match the Problem
|
|
0
|
35
|
June 2, 2026
|
|
Discrepancy Between RT Box 2 Results and Offline Simulation in PLECS 4.9.5
|
|
2
|
72
|
June 2, 2026
|
|
How to parallel N electrical ports in PLECS Blockset?
|
|
1
|
24
|
June 2, 2026
|
|
Malfunction of a rectifier using a transformer
|
|
2
|
47
|
May 31, 2026
|
|
Code generation error
|
|
3
|
61
|
May 29, 2026
|
|
Signal domain modeling
|
|
1
|
34
|
May 29, 2026
|
|
Simulation Parameters Initialization setting
|
|
1
|
28
|
May 28, 2026
|
|
SPI C / SCI C not supported for code generation with TI2737x
|
|
1
|
25
|
May 28, 2026
|
|
Large ADC sampling error on rt_box2 – ~8 deviation from true constant value
|
|
1
|
19
|
May 28, 2026
|