|
Welcome to PLECS User Forum! :wave:
|
|
0
|
1127
|
July 4, 2024
|
|
Newbie needs some help please for single phase meter
|
|
2
|
13
|
February 6, 2026
|
|
Reducing Simulation Time for Large-Scale Circuits
|
|
1
|
12
|
February 6, 2026
|
|
Faulty switch loss calculation in EPC GaN thermal models
|
|
2
|
29
|
February 6, 2026
|
|
How to convert mosfets' LTspice model or Pspice model to plecs model?
|
|
6
|
1202
|
February 6, 2026
|
|
Small-Signal Modeling and Control of LLC Resonant Converters in PLECS
|
|
0
|
7
|
February 6, 2026
|
|
Panning the schematic with mouse-click-drag
|
|
3
|
2415
|
February 6, 2026
|
|
Hyprland Drag and Drop Issue
|
|
3
|
404
|
February 6, 2026
|
|
Issue with Earth Fault Simulation Using Saturable Inductors – Integration Tolerance Error
|
|
3
|
95
|
February 6, 2026
|
|
The inner working of `Magnetic Resistance`
|
|
1
|
97
|
February 5, 2026
|
|
Debugging dll sometimes cause load symbol problem
|
|
3
|
83
|
February 5, 2026
|
|
Dual active bridge closing the current loop
|
|
2
|
81
|
February 5, 2026
|
|
How to configure the existing LLC resonant converter demo model for TI C2000 based on available model
|
|
1
|
75
|
February 5, 2026
|
|
Octave and PLECS font and icon sizes
|
|
2
|
277
|
February 5, 2026
|
|
12 windings mutual inductors
|
|
1
|
75
|
February 5, 2026
|
|
Loss Discrepancy Between PLECS Thermal Model and Fuji Electric Online Simulator (7MBR50VD120-50)
|
|
5
|
91
|
February 5, 2026
|
|
Generate large AI training dataset from PLECS (parameter sweep + peak current extraction)
|
|
1
|
66
|
February 5, 2026
|
|
Inquiries regarding RT Box HIL system
|
|
6
|
441
|
February 2, 2026
|
|
Connecting Output Port from STM32 Analog Output to Analog Input RT Box
|
|
1
|
114
|
February 2, 2026
|
|
Blockset masked circuit with fewer parameters in mask
|
|
2
|
226
|
January 30, 2026
|
|
Scaling power output using coupled voltage and current sources
|
|
3
|
404
|
January 28, 2026
|
|
Unstable 3 phase currents at speeds above 1000rpm
|
|
6
|
340
|
January 28, 2026
|
|
Error in building the program. Error in build step #5 (Make): Make process exited with code 2
|
|
3
|
475
|
January 22, 2026
|
|
Complementary PWM Signals overlaps at Digital Input Pins at RT Box 2
|
|
4
|
672
|
January 21, 2026
|
|
Scaling and Offset in RT Box and STM32
|
|
3
|
621
|
January 21, 2026
|
|
Discrepancy between Built-in Integrator and C-Script Implementation
|
|
4
|
745
|
January 21, 2026
|
|
Is autoscale limited to a maximum of traces?
|
|
6
|
1180
|
January 20, 2026
|
|
Full Bridge MMC
|
|
0
|
393
|
January 20, 2026
|
|
Seeking PLECS Simulation Model or Guidance for Alternate Arm Converter (AAC)
|
|
1
|
658
|
January 16, 2026
|
|
How to disable PWM singal in F28379?
|
|
4
|
1083
|
January 14, 2026
|